We have a custom 9G45 board running 2.6.35 main line kernel booting from NAND with the file system on a USB 2.0 hard disc.

The hard disc is connected using the EHCI controller and we can obtain 25MB/s transfer rate using the following command to test the interface:

dd if=/dev/sdb of=/dev/null bs1024k count=8

If we then wrap this command in a loop or increase the count to say 1024 after a short while we get USB reset's and disconnects.

All USB pcb traces were impedance matched and we have tried using a bare PCB to route the signals from a PC to a USB drive through. This completes a 64GB transfer with no errors.

+1V0 core is fed from a linear regulator and a separate 1v0 regulator feeds the PLL's etc via the filters specified in the datasheet.

Has anyone else tried this test on their own board / ek? What sort of results did you get?

Hi Matt,

I've got exactly the same problem. Did you ever find a solution for this? I've tried everything.... including re-routing board and getting Atmel approval for schem/pcb - but still have this problem!

Evan

Hi Evan

We haven't got to the bottom of the issue yet. We now have 3 designs with the 9G45 / 9M10 fitted and each one of them exhibits the same issue.

We did find lowering the drive strength to the DDR2 helped but still did not completely fix the issue.

I'll drop you a pm with my contact details if the forum will let me and perhaps we could have a chat?

Many thanks

Matt

Any Luck yet? I have the same issues as well..
Has anyone contacted Atmel on this yet?

OAC.

Hi canat91

Atmel have updated the errata for the device which is on the current datasheet. I have been in contact with Evan and we have tried a couple of things but nothing is concrete.

Send me a pm with your email and we can compare notes too.

Matt

I believe I may be running into the same issue with a custom AT91SAM9G45 based design. Has there been any other resolution in the past year; other than the aforementioned errata suggestions of resetting the USB Host interface and restarting the communications?

Just received notification of an April 23, 2012 release of Rev B of the AT91SAM9G45 that is supposed to resolve the High-Speed USB issues mentioned in the errata. We are getting samples and I will update with results when we get some of the new parts.

Hi

We have not worked with the 9G45 since our original issue back in 2010.

Thanks for posting about the rev B silicon, we have contacted our distributor to try and get a sample to try on the board we made. I will update here once we get the device and get it changed over on a board.

We replaced rev B chips on 3 of our prototypes today. Unfortunately, we are still observing the same instability on the high-speed USB controller. We will be contacting the FAE that informed us the rev B silicon resolved the USB issues to investigate further. I will post here again if we ever make any further progress.

Have you got DDR_DRIVE and EBI_DRIVE in CCFG_EBICSA cleared or set? We found that having them cleared for low drive strength made a significant difference to the USB reliability. I'm not sure if some of the other guys in this thread also tried bumping the series resistors to the DDR interface up in value to further reduce strength.

Let me know how you go.

Eureka! I naively believed the datasheet when it said those bits were off by default. At least, I did not see anywhere they were explicitly set. After explicitly clearing them, I have not see a USB drop-out yet with the rev B silicon. I went ahead and tried this change on one of the protos with the rev A silicon, USB was much improved, but I have still seen a few drop-outs.

This is encouraging progress.

Hi Matt and Thomas, I have the same issue with USB on the silicon rev. A and wanted to implement your advise and check it. Should I set DDR_DRIVE and EBI_DRIVE in the bootstrap?

Thank you in advance,

Sorry for the late response, vin.

I would recommend clearing those bits in all cases. Atmel has updated the datasheet for the rev B and it does state that these bits are now set by default.