Hi all!
I wrote the 100kHz signal generator by the TC0. Generator is working well, but now system can't see the rootfs on the MMC (before it was working well).
Timer initialization code:
Code:
#include <mach/at91_tc.h>
...
#define at91_tc_read(reg) __raw_readl(tc0_base + (reg))
#define at91_tc_write(reg, val) __raw_writel((val), tc0_base + (reg))
...
static int clock_gen(void)
{
void __iomem *tc0_base;
struct clk *tc0_clk;
tc0_base = ioremap_nocache(AT91SAM9260_BASE_TC0, 256);
if (!tc0_base) {
printk("Can't remap TC0 register area\n");
return -1;
}
tc0_clk = clk_get(NULL, "tc0_clk");
if (IS_ERR(tc0_clk)) {
iounmap(tc0_base);
printk("Error: can't find tc0_clk\n");
return -1;
}
clk_enable(tc0_clk);
at91_set_A_periph(AT91_PIN_PA26, 0);
at91_tc_write(AT91_TC_CMR,
AT91_TC_WAVE | AT91_TC_WAVESEL_UP_AUTO
| AT91_TC_ACPA_SET | AT91_TC_ACPC_CLEAR
| AT91_TC_TIMER_CLOCK2 ); // делитель для MCK, см даташит
at91_tc_write(AT91_TC_RC, 125); // число импульсов на период (делитель входящей частоты)
at91_tc_write(AT91_TC_RA, 62); // половина AT91_TC_RC если импульс/пауза 50/50
at91_tc_write(AT91_TC_IDR, -1);
at91_tc_write(AT91_TC_CCR, AT91_TC_SWTRG | AT91_TC_CLKEN);
iounmap(tc0_base);
return 0;
}
kernel message:
at91_mci at91_mci: Timeout waiting end of packet
I use the AT91SAMXE512 and kernel 3.2.4 with Full RT patch