System configuration:
AT91RM9200dk based processor board.
AT91RM9200dk based 2.6.16 kernel.
Busybox 1.4.1 based ramdisk.
Kernel not built with loadable module support.
Uboot 1.1.2 loads ramdisk and kernel from flash to ram, starts kernel.
no flash driver built into the kernel.
access via telnet, but not via the console.
PLLA and Master clock set incorrectly (master clock ends up at 59mhz instead of 179mhz).

I can build a kernel that correctly sets the PLLA and Master clock registers. However, for units in the field I do not have access to the console (so cannot install a new kernel). How can I write a usermode program to switch to direct mode addressing so I can write to the PLLA and Master clock registers? Or is there some other way to cause those two registers to get set correctly.

Thanks, Dave

Tough case...
You can not change those registers on-the-fly with current linux kernel. All the peripheal clock prescalers would need to be recalculated and those end up being incorrect. These registers must be set before all kernel peripheals are initialized. Probably by u-boot.
If you have root access to /dev/mem, you should be able to do register i/o through that interface. It depends, what kind of flash are you using. If the flash controller driver is not in the kernel (so that you won't need to compete with something), you might be able to write a program, that re-programs the flash that way. But it's a real pain, definitely...