I used latest binary downloaded from adeneo on my 9263-ek board. Following the instruction, I loaded firstboot, and eboot on dataflash, nk.nb0 on nandflash. It boots with some error, but wince still comes up, however, I can' see my nandflash in windows explorer. Please help. Thanks.

Nina

Dear Nina,

It's possible that the error you have during the boot up are linked to the nandflash driver and that's why you don't see the drive mounted in the explorer.

What is the version of your BSP? Do you use Windows CE5.0 or CE6.0? Which version of SAM-BA are you using?

Can you give us those information and the log of your error in order to help us investigate.

Kind Regards,
Adeneo Support team

I was using samba v2.5 and it didn't work for the board, so atmel support told me to use samba v2.7. samba 2.7 can write to dataflash and nandflash with no error messages but I need to scrub the nandflash. I downloaded the prebuilt binary image windows ce6.0 for at91sam9263 v120 revB released on March 17 2008. I don't see the option to attach log file here so I just paste it here, hopefully you can read it. I have another at91sam9263-ek board, I use same version of samba and windows ce6.0, however I didn't do scrub nandflash because I don't want to loose all the manufactured bad sectors. LIke the first board, samba can write nandflash, and dataflash, but it skip a lot of bad sectors in nandflash, but the board won't successfully boot, and keep resetting. I wish I could attach the log file so that you can see, but again, I don't see no option for attach file. The log below is successfully booting board which can find the nandflash after booting. I hope you can help me out here. Thanks

RomBOOT
> >
INFO : Low Level Init : OK
Init Data flash
Starting eboot ...
Master Clock is ÌÌÌÌÌÌÌÌ HzÿMaster Clock is ÌÌÌÌÌÌÌÌ HzÿMaster Clock is 50119552 Hzk
Debug serial initialized ........OK

Microsoft Windows CE Bootloader Common Library Version 1.4 Built Mar 10 2008 11:19:10
Microsoft Windows CE 6.0 Ethernet Bootloader for the AT91SAM926xEK board
Adaptation performed by ADENEO (c) 2007

Master Clock is 50119552 Hz
Master Clock is 50119552 Hzk
Debug serial initialized ........OK
Master Clock is 50119552 Hz
Master Clock is 50119552 Hz

Press [ENTER] to launch image stored in flash or [SPACE] to cancel.
Initiating image launch in 5 seconds  4 seconds 3 seconds 2 seconds 1 seconds 0 seconds
System ready!
Preparing for download...
Master Clock is 50119552 Hz
---------------------------------------
--- Configuring Chip Select 3 ---
---------------------------------------
--- Desired timings ---
---------------------------------------
dwNWE_SETUP 0
dwNCS_WR_SETUP 0
dwNRD_SETUP 0
dwNCS_RD_SETUP 0
dwNWE_PULSE 28
dwNCS_WR_PULSE 60
dwNRD_PULSE 56
dwNCS_RD_PULSE 60
dwNRD_CYCLE 28
dwNWE_CYCLE 56
dwClockPeriod_ns 20
---------------------------------------
--- Real timings ---
---------------------------------------
dwNWE_SETUP 0
dwNCS_WR_SETUP 0
dwNRD_SETUP 0
dwNCS_RD_SETUP 0
dwNWE_PULSE 40
dwNCS_WR_PULSE 60
dwNRD_PULSE 60
dwNCS_RD_PULSE 60
dwNRD_CYCLE 60
dwNWE_CYCLE 60
Found Micron (0x2c)- MT29F2G08AAD (0xda)
Master Clock is 50119552 Hz
---------------------------------------
--- Configuring Chip Select 3 ---
---------------------------------------
--- Desired timings ---
---------------------------------------
dwNWE_SETUP 0
dwNCS_WR_SETUP 0
dwNRD_SETUP 0
dwNCS_RD_SETUP 0
dwNWE_PULSE 28
dwNCS_WR_PULSE 60
dwNRD_PULSE 56
dwNCS_RD_PULSE 60
dwNRD_CYCLE 28
dwNWE_CYCLE 56
dwClockPeriod_ns 20
---------------------------------------
--- Real timings ---
---------------------------------------
dwNWE_SETUP 0
dwNCS_WR_SETUP 0
dwNRD_SETUP 0
dwNCS_RD_SETUP 0
dwNWE_PULSE 40
dwNCS_WR_PULSE 60
dwNRD_PULSE 60
dwNCS_RD_PULSE 60
dwNRD_CYCLE 60
dwNWE_CYCLE 60
Using Software ECC
OK
FMD_DirectRead lasted 5619 ms for 0x1513000 bytes (timer granularity is 400)
Launching windows CE image by jumping at address 0x2006d000Master Clock is 50119552 Hz‘½ÝÍ

The problem is urgent. We got 2 boards 3 weeks ago and can't load and run. If you can, please contact me at 408-984-1441. I really appreciate it.

Thanks.

Nina

Hello,
Regarding your first board which doesn't work at all, I think, you need to erase the whole nand flash because the bad block management has changed between samba 2.5 ans sam-ba 2.6. Our BSP only support the new bad block management.

Your second board (which starts correctly) seems to have ECC problem. So could you try to decrease the master clock value. To do so enter in bootloader menu. Then the 5th option permits you to select the core frequency and the divider of the core to obtain the master clock. So enter 180 for the processor clock with a divider 2.

Best Regards,
Adeneo Support Team

So I made the clock master rate as you suggested, it still doesn't work.
For the board that doesn't work at all, if the whole nandflash is erased, the manufactured bad block marks will be erased also. Will that make any trouble later on?