I just got the evaluation kit so I thought in order to get started it
would be good to try out the examples given by atmel. I downloaded
some of them, AT91SAM7X-BasicTools f.e. For some reason it wouldn't
open with my embedded workbench 4.3 (the "this is not a project
file"-error), so I guessed my workbench might be outdated. I
downloaded the latest trial of IAR Embedded Workbench for ARM 5.1.
This version actually managed to open the workspace and converted it
to the 5.1 format.

Although I actually managed to open it, the example doesn't seem to
run yet. The Cstartup.79 would say

section type missing here:



and this one's a bad instruction:



Can anyone tell me where the problem lies? I don't really understand
what's wrong with these lines...


best regards,
Michael[/code]

I ran into some similar problem today and thought I should share my findings because I think there is a flaw in the CStartup.s79 that is distributed with all IAR examples from Atmel. (maybe it exists for other compilers as well...don't know)

According to IARs EWARM Assembler Referens an ORG 0 is illegal in an RSEG
From their document:
"The result of the expression must be of the same type as the current segment, i.e. it is
not valid to use ORG 10 during RSEG, since the expression is absolute; use ORG .+10
instead. The expression must not contain any forward or external references.
All program location counters are set to zero at the beginning of an assembly module."

In my belief the Cstartup just happens to work because it happens to compile first in the sequence. so the interrupt vectors is placed at address 0 because it is the first in the ICODE segment.
I accidentally discovered this today when I created a file called ADCISREntry.s79 with code also placed in the ICODE segment with an RSEG directive. Suddenly the processor started executing my routine as the first thing it did... looking in the map file I realized my routine was located at address 0... I first thought the IAR linker had gone bananas...

After reading the Assembler reference I realized that my file was compiled before Cstartup.s79 (A comes before C...) and thus placed my code first in the ICODE segment that starts at 0...the org 0 statement had no effect in after an RSEG directive.

To solve it I simply put an ASEG directive before the org 0 directive in the Cstartup.s79 and everything compiled all right.[quote][/quote]

Hi

I am trying to compile SMX OS for AT91SAM7A1 using IAR EWARM ver 5.3

I got the same error

at this line have the following command


I added as suggested but the error is still there.
I checked the EWARM assembler reference and couldn't find the in assembler directives?
How I can overcome this problem?

Hi alzomor,

Neither the ASEG nor the ORG directive is supported in 5.30.

I believe you should use the SECTION directive nowadays and use a name that corresponds to a name in the linker configuration file. In this file you specify the address and size of this section (and all other sections in use).

Typically it can look like this:


Which would place the code after it at the address where the .intvec section is configured to be at. Usually 0.

This is a little off the top of my head so reservations for minor, but hopefully not so important, errors...