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 Post subject: Read or Write IO port with 20Mhz speed
PostPosted: Thu Jan 14, 2010 4:46 pm 
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Joined: Tue Jan 05, 2010 11:53 am
Posts: 1
Hi all,
I wana read a 20Mhz ADC data by AT91SAM7S128,I read about Atmel I/Os MaxFrequency but when i write code to set and clear an I/O pin continual in a while loop,its toggle speed just reached to 6 7 MHz!
now i wonder what's the 25Mhz maxspeed that mentioned in its datasheet? how we can reach to that toggle frequency?

thanks,
best regards,
pepe.


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 Post subject: Re: Read or Write IO port with 20Mhz speed
PostPosted: Thu Jan 28, 2010 8:39 pm 
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Joined: Tue Sep 29, 2009 1:14 pm
Posts: 9
Location: Sao Paulo/Brazil
another question:

how do we set VDDIO (options are 3.3V or 1.8V)?


The 25MHz speed applies to PA[16...4] and PA[31...21] at 3.3V VDDIO.


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 Post subject: Re: Read or Write IO port with 20Mhz speed
PostPosted: Fri Jan 29, 2010 9:56 pm 
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Joined: Tue Sep 29, 2009 1:14 pm
Posts: 9
Location: Sao Paulo/Brazil
Hi pepe,

I've made a lot of tests that I think it could be of your interest. What I saw is that there is a big difference using Atmel library for setting the pin output versus using a direct assignment to the register.

If you use GCC, you will see also that Optimizations Levels and Parameters play a big role in the toggle frequency. I've made the measurements with an Agilent Logic Analyzer. My board is an AT91SAM7S-EK.

  • Using Atmel library
    • Code:
      Code:
      #define PINO {1 << 3, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
      const Pin pino[] = { PINO };
      while(1){
         PIO_Clear(pino);
         PIO_Set(pino);
      }
    • Results:
      No Compiler Optimization
      Period: 1860ns (538kHz)
      Duty Cycle: 960/1860 = 52%


  • Writing straight to register
    • Code:
      Code:
      volatile unsigned int *PIO_SODR = (unsigned int *)0xFFFFF430;
      volatile unsigned int *PIO_CODR = (unsigned int *)0xFFFFF434;
      while(1){
         *PIO_CODR = 8;
         *PIO_SODR = 8;
      }
    • Results:
      No Compiler Optimization
      Period: 340ns (2.94MHz)
      Duty Cycle: 200/340 = 59%


  • Highly optimized
    • Writing straight to register
    • compiler parameters: -O1 -funroll-all-loops -fomit-frame-pointer
    • Results:
      Period: 125ns (8.00MHz)
      Duty Cycle: 65/125 = 52%

      In this test, for each 8 cycles, one had 187ns period. That give us an average of 7.67MHz.
      Running from flash drops toggle frequency to 6MHz (5.68MHz average).


I think results still can be optimized a lot, if you write code in assembly and if you use other compiler parameters (assembler parameters in this case).

A good reference: Optimization in GCC.



Regards,

Furuya


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