Hi there,

Working with AT91SAM7X128/512 here, and having the following problem:
Using TC0 in counter mode counting up to RC, then raising the RC comparison IRQ (which works).

However, what I'd like to do is to halt the TC0 and then continue it later. Something like this:
1) counter is running and everyone is happy
2) TC0_CCR = CLKDIS
3) some work is done
4) TC0_CCR = CLKEN
5) counter continues running and eventually will reach RC and that will IRQ and so on. Repeat from 1).

What I'm noticing is that once a counter is disabled, it cannot be enabled again with CLKEN. One has to SWTRG it in order to get it started again. This can be seen with TC0_SR::CLKSTA staying at zero, even after CLKEN is used.

If anyone has an idea how to avoid the problem I'm having, I'd be grateful. Disabling power from TC0 is one option, but it is likely that during the "some work is done" -period, TC0_RC is reprogrammed, and if the TC0 block is not getting power, then the results are undefined(?).

Originally I was planning to use the PIT for this, but it has a similar issue, so I decided to use TC0 instead.