AT91SAM7s256 - SPI problem

yeison · **Joined:** Fri Jan 08, 2010 12:20 pm **Posts:** 6

Hello everyone.
I spent the last week trying to configure the SPI port but I am not able to do it works. I use the evaluation board AT91SAM7s-EK. The examples of the website are weird to understand and the datasheet is not very clear. The configuration is the simplest (without interrupt and DMA) but I don't have idea how to get it works.
My configure is this:

Code:

/********************************************************************************
*
* program: setup_SPImaster
*
*Summary: It makes the configuration of the microcontroller
*
********************************************************************************/
#include "board.h"
#include "include/AT91SAM7S256.h"

#define DLYBCS  ((unsigned int) 0x0A << 24) //Delay between chip select of aprox 2Tclk = 0,2us
#define SCBR0   ((unsigned int) 0x05 << 8)  //Serial clock baud rate = MCK/SPCK (SPCK=20Mhz for slave0)
#define DLYBS0  ((unsigned int) 0x00 << 16)  //Delay before SPCK by default 1/2 SPCK clock period
#define DLYBCT0 ((unsigned int) 0x00 << 24)  //Delay between consecutive transfer (zero value-->Not delay)

#define LAN_SLAVE  0     //It is Choosen the slave 0 for the ECN28J60
//#define READER_SLAVE 1 //It is Choosen the slave 1 for the INDY R2000

extern void setup_SPImaster (void);
extern void spi_IrqHandler (void);

/********************************************************************************
*
*SETUP_SPIMASTER
********************************************************************************/

void setup_SPImaster (void){

 AT91PS_SPI pSPI = AT91C_BASE_SPI;   // Pointer to SPI structure
 AT91PS_PIO pPIO = AT91C_BASE_PIOA;  // Pointer to PIOA structure
 AT91PS_AIC pAIC = AT91C_BASE_AIC;   // Pointer to AIC structure
 unsigned int PerA=0, PerB=0;
 unsigned int mode, confcs0;


 //(1) Initialization of AT91SAM7s256
 //   It asigns the pins that you want to have at SPI

  PerA = (((unsigned int)AT91C_PA11_NPCS0)|
         ((unsigned int) AT91C_PA12_MISO) |
         ((unsigned int) AT91C_PA13_MOSI) |
         ((unsigned int) AT91C_PA14_SPCK) |
         ((unsigned int) AT91C_PA30_IRQ1)|
         ((unsigned int) AT91C_PA31_NPCS1));

  PerB = ((unsigned int) AT91C_PA20_IRQ0);

     AT91F_PIO_CfgPeriph (pPIO, PerA, PerB);

   AT91F_SPI_Reset (pSPI);
 
  //(2) Enable SPI in the PMC
  // Enable the Peripheral Clock for SPI
    AT91F_SPI_CfgPMC ();

  //(3)Configuration of Master mode
  //Conf_ Mode Register
  mode= AT91C_SPI_MSTR       |
        AT91C_SPI_PS_VARIABLE|
        //AT91C_SPI_PCSDEC   |
        AT91C_SPI_MODFDIS    |
       //     AT91C_SPI_LLB    |     //local loopback
       // AT91C_SPI_PCS     |
        DLYBCS;

  AT91F_SPI_CfgMode(pSPI, mode);

 //Conf_chipSelects
 //Ethernet controller --> Chip Select 0

 confcs0= // AT91C_SPI_CPOL |
          AT91C_SPI_NCPHA   |
            AT91C_SPI_CSAAT |
          AT91C_SPI_BITS_8  |
          SCBR0             |
          DLYBS0            |
          DLYBCT0;

 AT91F_SPI_CfgCs( pSPI, LAN_SLAVE, confcs0);

 //Indy R2000 --> Chip Select 1 -- NOT DEFINED YET --
 //AT91F_SPI_CfgCs( pSPI,READER_SLAVE, confcs1);

 //(4)Enable  SPI to transfer and receive data (pSPI->SPI_CR.SPIEN=1)

 //AT91F_SPI_Enable (pSPI);  
 AT91F_SPI_Enable(AT91C_BASE_SPI);

 /*///(5)Configuration Advanced Interrupt Controller (AIC) registers for SPI                                    
 // Set up AIC register
 //Function spi_IrgHandler is assigned to SPI interrupt
 // Set the interrupt source type and priority 7
  AT91F_AIC_ConfigureIt (pAIC, AT91C_ID_SPI,7,AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE , spi_IrqHandler);
     
  // Enable the SPI interrupt in AIC Interrupt Enable (0X00000020)
  AT91F_AIC_EnableIt (pAIC, AT91C_ID_SPI);

  //(6)Interrupt Enable Register(pSPI->SPI_IER)
  AT91F_SPI_EnableIt (pSPI, (AT91C_SPI_RDRF | AT91C_SPI_TDRE | AT91C_SPI_OVRES |AT91C_SPI_TXEMPTY |AT91C_SPI_NSSR));  */

After this configuration, the register SPI_SR= 0x000102F2 and never changes. To initialize the SPI communication, I do the following steps

1. Poll TXEMPTY to verify if the register and the serializer are empty.
while (!(pSPI -> SPI_SR & AT91C_SPI_TXEMPTY));
2. Write in the Transmission register
pSPI->SPI_TDR= TDframe;
3. Wait until RDRF=1
while (!(pSPI -> SPI_SR & AT91C_SPI_RDRF);
4. Read the receiver register
u32 data;
data= pSPI->SPI_RDR

When I write in the SPI_TDR the data is copy to the SPI_RDR but the flag never change.
If I try to visualize any SPI signal by the oscilloscope I don't get any result.

What am I doing wrong? Some suggestion?

Thank you.

gerhardf · **Joined:** Thu Dec 02, 2004 2:28 pm **Posts:** 454

hello
from my point of view AT91F_SPI_CfgPMC (); should be called before AT91F_SPI_Reset (pSPI);

regards
gerhard

yeison · **Joined:** Fri Jan 08, 2010 12:20 pm **Posts:** 6

Finally, I got visualize the SPI signals. But now my problem is other.

I am using like slave of ECN28J60 Ethernet Controller of Microchip. Its SPI has this configuration.
*Mode0,0 --> CPOL=0, CKE=1
As CKE = NCPHA, The configuration is the AT91SAM7s256 is the mode 0 also.
*SCK < 20 Mhz

After some attempts the result is still weird. When I try to read a MAC register after writing its value. The way that I use to visualize the content is with a scope ( one channel for the clock and the others for the MOSI and MISO line) because I don´t have a logic analizer.
For this reason, I do a while(1)-loop and I read continuosly the register previously wrote.

For the kind of register ETH the solution is perfect, to read the content you must send two bytes on the MOSI line.
MOSI --> 1st byte (OPcode_read +Address) ; 2nd byte (dummy-->Zero)
MISO --> 1st byte - High Impedance ; 2nd byte (content of register)

For MAC/MII registers the read is different
MOSI --> 1st byte (OPcode_read +Address) ; 2nd byte (dummy); 3rd byte (dummy)
MISO --> 1st byte - High Impedance ; 2nd byte (dummy); 3rd byte (content of register).

When I visualize the MAC/MII register, Its content sometimes is showed in the 2nd dummy byte of the MOSI line and other times I only can see 'zeros frame'. But never in the 3rd byte like Microchip told you.

If I write two or more registers MAC/MII, when I try to watch the content of the first of them, the last data write is showed in the 2nd dummy byte of the MOSI line

I have reviewed the connections and the configuration but all is right. Maybe, this behaviour is due to the way to visualize the SPI signals. What do you think?

Thank you.

AT91SAM7s256 - SPI problem

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