mjbcswitzerland wrote:
Hi All
I wonder whether anyone familiar with the NAND interface on the SAM7SE can comment on the following ATMEL initialisation code?
// Disable Pull ups on A21/NANDALE and A22/NANDCLE
AT91C_BASE_PIOC -> PIO_PPUDR = ((1 << 21) | (1 << 22));
As far as I can determine A21/NANDALE is on PC19 and A22/NANDCLE is on PC20. That would means that the pullups are in fact being removed from lines PC21 and PC22, which don't have anything to do with the NAND interface.
I presume that this is an error - is there any need to remove pull-ups?
Regards
Mark
1. apparently that's an error
2. Assuming that SAM7 PIO is quite similar to SAM9 PIO, removing pullups will save a bit of power, since ALE and CLE are mostly low during NAND operation. It would just be preferable to remove pullups near the code which assigns those pins as outputs (or to the memory controller).
Reinhard
1. apparen