Hey,
I am having a hard time getting nested interrupts to work. I am programming in C and use GCC to compile.

Basically I want to have to interrupt sources. One is the PIT which gives me a system tick. The other one is the USART Receive.
I want the tick to have a higher priority than the USART, I even want to have the USART ISR to be interruptible.. So I set priority for PIT to 7 and for USART to 0.
As I read in the manual, I have to re-enable Interrupts inside the ISR to allow interruption of the USART ISR.
I am not sure how to actually do that.
I enter my USART ISR and read AIC-IVR first to acknowledge the interrupt.
So now I know that once the execution of the ISR has started, no other interrupt can be served unless I re-enable Interrupts. How do I do that? I tried writing AIC_IECR but that didn't work.
At the end of my USART ISR I write AIC_EOICR to leave the ISR.

I read AIC-IVR also as I enter the PIT_ISR.

Any ideas?

Regards,

>>At the end of my USART ISR I write AIC_EOICR to leave the ISR.

Have you tried moving that line to the top of your interrupt (right after reading AIC_IVR) ?
-Just remember to save the registers you use on the stack, when you nest interrupts.

Sorry, I was not able to test your advice earlier.
Sadly that did not make any difference.

I did not find any examples with interrupt nesting in C.

I need to make sure that the PIT ISR always happens.

Any other ideas?

Hello,
sadly I haven't made any progress.

It looks like the I need to do the interrupt system in ASM. I am totally not used to program in ASM.
Anybody know a good tutorial or easy Example on how to setup the interrupt system in ASM?


Regards

There are plenty of books on ARM 7 & 9 Assembler, try Amazon
http://www.amazon.com/s/ref=nb_sb_ss_i_ ... y+language

Or plenty of material on the interwebs
http://www.google.com/#q=arm+assembly+language
http://www.google.com/#q=arm+assembly+tutorial

Not sure if you're stuck on GCC, Keil and IAR compilers (Demo/Eval) come with plenty of code examples of various types, and for various ARM7 platforms, that might be instructive.

Also what is your latency requirement for the timer?

Consider using the FIQ for critically fast routines.

Consider why your USART interrupt is take so long as to be a problem. You should be able to service a USART interrupt fairly efficiently, say less than 50-100 cycles.

The PIT emits a tick every 100uSek.

My Uart routine is short.
But once I am inside the UART ISR I can miss some ticks. So I was curious how to use interrupt nesting. Therefore, I forced my UART ISR to be infinite (that is just for testing)
I probably can live without nesting, and it won't hurt much to miss a couple of ticks.

Regards

Missing an interrupt would suggest you are blocking for over 100 us, rather than simply delaying the servicing slightly. So, what would be multiple interrupts from the timer merge into one.

100 us @ 10 MHz would be 1000 cycles, and I suspect you are running at a higher frequency than that. That would be a long time to be in an efficient USART service routine.

You should also keep the timer interrupt well under the repetitive period.

Well,
yes you are right.
Is there a way to measure the length of my ISRs?