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 Post subject: ARM Data Abort Exception after USART Interrupt Enable
PostPosted: Sun Jan 09, 2011 7:25 am 
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Joined: Sun Jan 09, 2011 6:55 am
Posts: 2
Hi everyone,
I am new to ARM development and would like some help.
I am trying to configure the USART to send some characters. While, I am able to send those in the polling mode, I am having some issues when I use the interrupt method of USART.

After configuring the registers (enabling clock, enabling IECR in AIC , setting CR, MR and BRGR), I perform these two operations at the end.

AT91C_BASE_US0->US_CR=AT91C_US_TXEN ; enabling the transmitter
AT91C_BASE_US0->US_IER=AT91C_US_TXEMPTY ; enabling the interrupt

Reading the data sheets , I found that as soon as the transmitter is enabled, The TXempty bit in US_CSR is set. Does that mean that immediately after enabling the interrupt, my ISR is getting called ?

IN my case, immediately after the enabling the interrupt , I am getting the ARM undefined instruction exception.

Does anyone what is happening here / what is supposed to happen ?
Thanks in advance.
Cheers


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 Post subject: Re: ARM Data Abort Exception after USART Interrupt Enable
PostPosted: Sun Jan 09, 2011 3:11 pm 
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Joined: Sat Oct 30, 2010 6:04 pm
Posts: 574
You need to set an interrupt in the AIC, and have a suitable INT/FIQ jump to the AIC vector.

You need to have a valid interrupt handler, coded for the ARM7.

Your description sounds like it's getting an interrupt and jumping to some invalid code, perhaps some thumb code, perhaps some random address.

Try looking at some example code for the chip/board, IAR and Keil compilers have such code, and Atmel typically has various downloads for their multiple offerings.


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 Post subject: Re: ARM Data Abort Exception after USART Interrupt Enable
PostPosted: Sun Jan 09, 2011 7:32 pm 
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Joined: Sun Jan 09, 2011 6:55 am
Posts: 2
Thanks for replying.
Regarding the USART exception, I am configuring the exception handler in the AIC_SVR vector. The thing is even after configuring the ISR, The program is not jumping to the iSR routine. It is getting to some illegal address, and thats why the exception.

Is there a particular sequence in which the registers should be configured. I mean, according to the datasheet, if the TX is enabled, the TXEMPTY bit in US_CSR gets set and I am assuming that the ISR is fired right then.

I looked at the sample code and I am on the similar lines.
Would it be too much to ask for if you could post a sample USART interrupt code that works ?
Thanks a bunch


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 Post subject: Re: ARM Data Abort Exception after USART Interrupt Enable
PostPosted: Mon Jan 10, 2011 1:31 am 
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Joined: Sat Oct 30, 2010 6:04 pm
Posts: 574
In terms of ordering, you should set up any data structures your IRQ handler uses, set up the vectors, and then enable the routines. If you don't have any pending data to transmit, enabling the TX interrupt probably isn't a good plan as you won't be able to clear the empty condition. There are certainly several ARM architectures that will generate an IRQ crap storm if you don't clear and service the interrupt sources. Kinda moved on from ARM7.

Not sure what compiler you are using, but you'll need to define your handler routine with IRQ calling conventions/wrapper code.

Also be aware that the ARM will trap if you access unaligned 16-bit or 32-bit words.


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