Hi
I get an abort exception.
When checking the Abort registers it looks like the CPU was in IRQ mode.
The stack pointer of the IRQ is at the top of the stack meaning the SW did not even got a chance to handle the interrupt - this I know since at the beginning of each ISR the SW perform a push of R14.
When checking the MC I see that there is Data Read violation - Misaligned address reading WORD (LONG) from address 0xFFFFF101.
The wierd thing is that I have a handler on every exception - doing a very simple thing saving a number to R1 and branch to a code that perform HW reset - this is for debugging purposes so when I put a HW break point on the HW reset code I will know which exception occured, and it seems like I do not go in any of them since the value of R1 does not match any of them.
Since the CPU is in Abort state and all abort exceptions have handers I expect to go through one of them.
The code for reading and jumping to the ISR is very simple one line at addess 0x18:
ldr pc,[pc,-0xF20] which is always supposed to give 0xFFFFF100 which is the AIC_IVR address. It looks like something is going wrong here and this line translate somehow to 0xFFFFF101 and trying to read a long from that address generate the Abort exception.
Someone has any idea what can cause this and how to fix it? To me it looks like a HW interference that cause this problem.
Thanks
Ophir

That or the AIC_IVR is *returning* 0xFFFFF101, or some other disagreeable value, and it's loading that into the PC

Or perhaps your interrupt service routine is written in Thumb code.

The problem was found.
Since the IRQ vector lies in RAM a NULL pointer to a structure that has a field at offset 0x18 that made a statement like this p->f1-- caused the instrution at 0x18 to be e5FFFF1F instead of e5FFFF20, so when you look at the code in the debugger you see what is supposed to be the instruction at 0x18 but if you go and look directly at the memory you can see it was modified.
The e5FFFF20 instruction is ldr pc,[pc,-F20] which generate the address of the AIC_IVR (0xFFFFF100) the e5FFFF1F instruction is ldr pc,[pc,-F1F] which generate the address 0xFFFFF101 and hence cause the data abort. Since this NULL pointer changed some other instructions the SW did not pass in any of the abort handlers.
Thanks
Ophir