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 Post subject: AT91SAM7S128 Rev C issue with IAR
PostPosted: Wed Sep 07, 2011 6:52 pm 
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Joined: Fri Jan 08, 2010 12:00 am
Posts: 10
Hello all,

I have just upgraded my hardware from Rev B to Rev C chips of AT91SAM7S128. But i am facing a strange problem when try to download and debug code through IAR Embedded Workbench for ARM with J-Link Jtag device from segger. Same project with same download settings programming the Rev B chips but not the REV C. However Rev C chips are being programmed correctly using J-Flash utility and then can be debug as well. But IAR is unable to program the Rev C chip some how and not writing to ROM/Flash any thing. I wonder if any one have experience such an issue before and now the exact reason to solve the problem. It will be really helpful if some one can share the appropriate information.

Regards... Dani:(


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 Post subject: Re: AT91SAM7S128 Rev C issue with IAR
PostPosted: Wed Sep 07, 2011 9:14 pm 
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Joined: Sat Oct 30, 2010 6:04 pm
Posts: 784
Perhaps you want to get an update from IAR which has the most recent flash applets for programming the chip. You don't mention a version, but a call to your IAR support rep should work.


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 Post subject: Re: AT91SAM7S128 Rev C issue with IAR
PostPosted: Thu Sep 08, 2011 10:12 am 
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Joined: Fri Jan 08, 2010 12:00 am
Posts: 10
Thanks cptTitanic,

I am using IAR 5.41 version.


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 Post subject: Re: AT91SAM7S128 Rev C issue with IAR
PostPosted: Fri Sep 09, 2011 2:48 pm 
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Joined: Thu Dec 02, 2004 2:28 pm
Posts: 504
hello dani,
i would suspect that the the startup-macro of EWARM isn't initializing the PLL the right way.
what macro file do you use (look at General options -> Debugger -> Use macro file)
does the debug log show any error messages?

regards
gerhard


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 Post subject: Re: AT91SAM7S128 Rev C issue with IAR
PostPosted: Fri Sep 09, 2011 5:35 pm 
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Joined: Fri Jan 08, 2010 12:00 am
Posts: 10
Hi gerhard,

The mac file is at91sam7s-ek-flash.mac and here is the log for both Rev B and Rev C MCU respectively. Please see if you can guess anything.

For Rev B>>>>>>>>>>>>>>>>>>
Fri Sep 09 19:47:06 2011: Loaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 5.4\arm\config\flashloader\ATMEL\resources\FlashAT91SAM7Sxx.mac
Fri Sep 09 19:47:07 2011: DLL version: V4.34c, compiled Sep 6 2011 20:20:21
Fri Sep 09 19:47:07 2011: Firmware: J-Link ARM V8 compiled Sep 6 2011 16:33:14
Fri Sep 09 19:47:07 2011: JTAG speed is initially set to: 32 kHz
Fri Sep 09 19:47:07 2011: TotalIRLen = 4, IRPrint = 0x01
Fri Sep 09 19:47:07 2011: Hardware reset with strategy 8 was performed
Fri Sep 09 19:47:07 2011: Initial reset was performed
Fri Sep 09 19:47:07 2011: Found 1 JTAG device, Total IRLen = 4:
Fri Sep 09 19:47:07 2011: #0 Id: 0x3F0F0F0F, IRLen: 4, IRPrint: 0x1 ARM7TDMI Core
Fri Sep 09 19:47:07 2011: J-Link found 1 JTAG device(s). ARM core Id: 3F0F0F0F ARM7
Fri Sep 09 19:47:07 2011: Device at TAP0 selected
Fri Sep 09 19:47:07 2011: Device "AT91SAM7S128" selected (128 KB flash, 32 KB RAM).
Fri Sep 09 19:47:07 2011: JLINK command: ProjectFile = D:\Code\settings\V_Debug.jlink, return = 0
Fri Sep 09 19:47:07 2011: Device "AT91SAM7S128" selected (128 KB flash, 32 KB RAM).
Fri Sep 09 19:47:07 2011: JLINK command: device = AT91SAM7S128, return = 0
Fri Sep 09 19:47:07 2011: ---------------------------------------- FLASH Download V1.3
Fri Sep 09 19:47:07 2011: ---------------------------------------- 14/November/2005
Fri Sep 09 19:47:07 2011: ---------------------------------------- PLL Enable
Fri Sep 09 19:47:07 2011: -------------------------------Set CPSR ----------------------------------
Fri Sep 09 19:47:07 2011: CPSR 000000D3
Fri Sep 09 19:47:08 2011: ---------------------------------------- PLL Enable
Fri Sep 09 19:47:08 2011: ------------------------------- The Remap is NOT -----------------------------------------
Fri Sep 09 19:47:08 2011: ---------------------------------------- Chip ID 0x270A0741
Fri Sep 09 19:47:08 2011: ---------------------------------------- Extention 0x00000000
Fri Sep 09 19:47:08 2011: ---------------------------------------- Flash Version 0x00000112
Fri Sep 09 19:47:08 2011: -------------------------------Set PC ----------------------------------------
Fri Sep 09 19:47:08 2011: RTCK is not connected
Fri Sep 09 19:47:08 2011: Auto JTAG speed: 8000 kHz
Fri Sep 09 19:47:09 2011: 6656 bytes downloaded (14.87 Kbytes/sec)
Fri Sep 09 19:47:09 2011: Loaded debugee: C:\Program Files\IAR Systems\Embedded Workbench 5.4\arm\config\flashloader\ATMEL\AT91SAM7S128-EK\internalflash-sam7s128.out
Fri Sep 09 19:47:09 2011: Target reset
Fri Sep 09 19:47:09 2011: -I- Internal flash loader
Fri Sep 09 19:47:09 2011: -I- Unlock arguments: address 0x00104000 of 0x4000 Bytes
Fri Sep 09 19:47:09 2011: -I- Write arguments: address 0x00104000, offset 0x1000 of 0x3000 Bytes
Fri Sep 09 19:47:09 2011: -I- Unlock arguments: address 0x00108000 of 0x4000 Bytes
Fri Sep 09 19:47:10 2011: -I- Write arguments: address 0x00108000, offset 0x0 of 0x4000 Bytes
Fri Sep 09 19:47:10 2011: -I- Unlock arguments: address 0x0010c000 of 0x4000 Bytes
Fri Sep 09 19:47:10 2011: -I- Write arguments: address 0x0010c000, offset 0x0 of 0x4000 Bytes
Fri Sep 09 19:47:11 2011: -I- Unlock arguments: address 0x00110000 of 0x4000 Bytes
Fri Sep 09 19:47:11 2011: -I- Write arguments: address 0x00110000, offset 0x0 of 0x4000 Bytes
Fri Sep 09 19:47:12 2011: -I- Unlock arguments: address 0x00114000 of 0x4000 Bytes
Fri Sep 09 19:47:12 2011: -I- Write arguments: address 0x00114000, offset 0x0 of 0x4000 Bytes
Fri Sep 09 19:47:12 2011: -I- Unlock arguments: address 0x00118000 of 0x4000 Bytes
Fri Sep 09 19:47:12 2011: -I- Write arguments: address 0x00118000, offset 0x0 of 0x4000 Bytes
Fri Sep 09 19:47:13 2011: -I- Unlock arguments: address 0x0011c000 of 0x4000 Bytes
Fri Sep 09 19:47:13 2011: -I- Write arguments: address 0x0011c000, offset 0x0 of 0x4000 Bytes
Fri Sep 09 19:47:14 2011: execUserFlashExit
Fri Sep 09 19:47:14 2011: ------------------------------- The Remap is done -----------------------------------------
Fri Sep 09 19:47:14 2011: Downloaded D:\Code\Debug\Exe\V.out to flash memory.
Fri Sep 09 19:47:14 2011: Loaded macro file: D:\Code\at91sam7s-ek-flash.mac
Fri Sep 09 19:47:14 2011: TotalIRLen = 4, IRPrint = 0x01
Fri Sep 09 19:47:15 2011: Hardware reset with strategy 8 was performed
Fri Sep 09 19:47:18 2011: 108334 bytes downloaded into FLASH (11.84 Kbytes/sec)
Fri Sep 09 19:47:18 2011: Loaded debugee: D:\Code\Debug\Exe\V.out
Fri Sep 09 19:47:18 2011: RTCK is not connected
Fri Sep 09 19:47:18 2011: Auto JTAG speed: 8000 kHz
Fri Sep 09 19:47:18 2011: Target reset
Fri Sep 09 19:47:18 2011: execUserReset()
Fri Sep 09 19:47:18 2011: TotalIRLen = 4, IRPrint = 0x01
Fri Sep 09 19:47:19 2011: Hardware reset with strategy 0 was performed
Fri Sep 09 19:47:19 2011: Enable Main Oscillator
Fri Sep 09 19:47:19 2011: RTCK is not connected
Fri Sep 09 19:47:19 2011: Auto JTAG speed: 8000 kHz
Fri Sep 09 19:47:19 2011: Set PLL to 96MHz
Fri Sep 09 19:47:19 2011: Set Master Clock to 48MHz
Fri Sep 09 19:47:19 2011: Failed to set breakpoint at 0x00000008
Fri Sep 09 19:47:20 2011: Update all software breakpoints was performed

And for Rev C>>>>>>>>>>>>>>>>>>

Fri Sep 09 20:32:07 2011: Loaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 5.4\arm\config\flashloader\ATMEL\resources\FlashAT91SAM7Sxx.mac
Fri Sep 09 20:32:09 2011: DLL version: V4.34c, compiled Sep 6 2011 20:20:21
Fri Sep 09 20:32:09 2011: Firmware: J-Link ARM V8 compiled Sep 6 2011 16:33:14
Fri Sep 09 20:32:09 2011: JTAG speed is initially set to: 32 kHz
Fri Sep 09 20:32:09 2011: TotalIRLen = 4, IRPrint = 0x01
Fri Sep 09 20:32:09 2011: Hardware reset with strategy 8 was performed
Fri Sep 09 20:32:09 2011: Initial reset was performed
Fri Sep 09 20:32:09 2011: Found 1 JTAG device, Total IRLen = 4:
Fri Sep 09 20:32:09 2011: #0 Id: 0x3F0F0F0F, IRLen: 4, IRPrint: 0x1 ARM7TDMI Core
Fri Sep 09 20:32:09 2011: J-Link found 1 JTAG device(s). ARM core Id: 3F0F0F0F ARM7
Fri Sep 09 20:32:09 2011: Device at TAP0 selected
Fri Sep 09 20:32:09 2011: Device "AT91SAM7S128" selected (128 KB flash, 32 KB RAM).
Fri Sep 09 20:32:09 2011: JLINK command: ProjectFile = D:Code\settings\V_Debug.jlink, return = 0
Fri Sep 09 20:32:09 2011: Device "AT91SAM7S128" selected (128 KB flash, 32 KB RAM).
Fri Sep 09 20:32:09 2011: JLINK command: device = AT91SAM7S128, return = 0
Fri Sep 09 20:32:09 2011: ---------------------------------------- FLASH Download V1.3
Fri Sep 09 20:32:09 2011: ---------------------------------------- 14/November/2005
Fri Sep 09 20:32:09 2011: ---------------------------------------- PLL Enable
Fri Sep 09 20:32:09 2011: -------------------------------Set CPSR ----------------------------------
Fri Sep 09 20:32:09 2011: CPSR 000000D3
Fri Sep 09 20:32:10 2011: ---------------------------------------- PLL Enable
Fri Sep 09 20:32:10 2011: ------------------------------- The Remap is NOT -----------------------------------------
Fri Sep 09 20:32:10 2011: ---------------------------------------- Chip ID 0x270A0742
Fri Sep 09 20:32:10 2011: ---------------------------------------- Extention 0x00000000
Fri Sep 09 20:32:10 2011: ---------------------------------------- Flash Version 0x00000113
Fri Sep 09 20:32:10 2011: -------------------------------Set PC ----------------------------------------
Fri Sep 09 20:32:10 2011: RTCK is not connected
Fri Sep 09 20:32:10 2011: Auto JTAG speed: 8000 kHz
Fri Sep 09 20:32:12 2011: 6656 bytes downloaded (5.27 Kbytes/sec)
Fri Sep 09 20:32:12 2011: Loaded debugee: C:\Program Files\IAR Systems\Embedded Workbench 5.4\arm\config\flashloader\ATMEL\AT91SAM7S128-EK\internalflash-sam7s128.out
Fri Sep 09 20:32:12 2011: Target reset
Fri Sep 09 20:32:12 2011: -I- Internal flash loader
Fri Sep 09 20:32:12 2011: -I- Unlock arguments: address 0x00104000 of 0x4000 Bytes
Fri Sep 09 20:32:12 2011: -I- Write arguments: address 0x00104000, offset 0x1000 of 0x3000 Bytes
Fri Sep 09 20:32:12 2011: -I- Unlock arguments: address 0x00108000 of 0x4000 Bytes
Fri Sep 09 20:32:12 2011: -I- Write arguments: address 0x00108000, offset 0x0 of 0x4000 Bytes
Fri Sep 09 20:32:13 2011: -I- Unlock arguments: address 0x0010c000 of 0x4000 Bytes
Fri Sep 09 20:32:13 2011: -I- Write arguments: address 0x0010c000, offset 0x0 of 0x4000 Bytes
Fri Sep 09 20:32:13 2011: -I- Unlock arguments: address 0x00110000 of 0x4000 Bytes
Fri Sep 09 20:32:13 2011: -I- Write arguments: address 0x00110000, offset 0x0 of 0x4000 Bytes
Fri Sep 09 20:32:13 2011: -I- Unlock arguments: address 0x00114000 of 0x4000 Bytes
Fri Sep 09 20:32:13 2011: -I- Write arguments: address 0x00114000, offset 0x0 of 0x4000 Bytes
Fri Sep 09 20:32:14 2011: -I- Unlock arguments: address 0x00118000 of 0x4000 Bytes
Fri Sep 09 20:32:14 2011: -I- Write arguments: address 0x00118000, offset 0x0 of 0x4000 Bytes
Fri Sep 09 20:32:14 2011: -I- Unlock arguments: address 0x0011c000 of 0x4000 Bytes
Fri Sep 09 20:32:14 2011: -I- Write arguments: address 0x0011c000, offset 0x0 of 0x4000 Bytes
Fri Sep 09 20:32:14 2011: execUserFlashExit
Fri Sep 09 20:32:14 2011: ------------------------------- The Remap is done -----------------------------------------
Fri Sep 09 20:32:14 2011: Downloaded D:\Code\Debug\Exe\V.out to flash memory.
Fri Sep 09 20:32:14 2011: Loaded macro file: D:\Code\at91sam7s-ek-flash.mac
Fri Sep 09 20:32:14 2011: TotalIRLen = 4, IRPrint = 0x01
Fri Sep 09 20:32:16 2011: Hardware reset with strategy 8 was performed
Fri Sep 09 20:32:19 2011: 108334 bytes downloaded into FLASH (14.53 Kbytes/sec)
Fri Sep 09 20:32:19 2011: Loaded debugee: D:\Code\Debug\Exe\V.out
Fri Sep 09 20:32:19 2011: RTCK is not connected
Fri Sep 09 20:32:19 2011: Auto JTAG speed: 8000 kHz
Fri Sep 09 20:32:19 2011: Target reset
Fri Sep 09 20:32:19 2011: execUserReset()
Fri Sep 09 20:32:19 2011: TotalIRLen = 4, IRPrint = 0x01
Fri Sep 09 20:32:20 2011: Hardware reset with strategy 0 was performed
Fri Sep 09 20:32:20 2011: Enable Main Oscillator
Fri Sep 09 20:32:21 2011: RTCK seems to be bridged with TCK
Fri Sep 09 20:32:21 2011: Auto JTAG speed: 8000 kHz
Fri Sep 09 20:32:21 2011: Set PLL to 96MHz
Fri Sep 09 20:32:21 2011: Set Master Clock to 48MHz
Fri Sep 09 20:32:21 2011: Failed to set breakpoint at 0x00000008
Fri Sep 09 20:32:21 2011: Update all software breakpoints was performed
Fri Sep 09 20:32:21 2011: The stack pointer for stack 'CSTACK' (currently 0x00000000) is outside the stack range (0x00200200 to 0x00201200)
Fri Sep 09 20:32:21 2011: The stack pointer for stack 'IRQ_STACK' (currently 0x00000000) is outside the stack range (0x00201200 to 0x00201700)
Fri Sep 09 20:32:21 2011: The stack pointer for stack 'FIQ_STACK' (currently 0x00000000) is outside the stack range (0x00201700 to 0x00201750)
Fri Sep 09 20:32:21 2011: The stack pointer for stack 'UND_STACK' (currently 0x00000000) is outside the stack range (0x00201750 to 0x002017A0)
Fri Sep 09 20:32:21 2011: The stack pointer for stack 'ABT_STACK' (currently 0x00000000) is outside the stack range (0x002017A0 to 0x002017F0)


Best Regards,
Dani


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 Post subject: Re: AT91SAM7S128 Rev C issue with IAR
PostPosted: Fri Jan 25, 2013 4:44 pm 
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Joined: Thu Jan 24, 2013 4:35 pm
Posts: 1
Hi everybody, especially Danni:

I have exactly the same problem, With the same CPU but of 2008 year, I can download without problem, as a result, it works fine. Now we have just set up new cards with this new version (revision C) it does not work. However, I have proved if I download it in SRAM mode the Stack pointer goes to the correct address works and as a result, the CPU works. But when I switch off the CPU the memory is erased.

Did you solve this problem?Could you give some advice?

I look forward to reading from you,

Aritz


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 Post subject: Re: AT91SAM7S128 Rev C issue with IAR
PostPosted: Sat Jan 26, 2013 4:30 pm 
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Joined: Thu Dec 02, 2004 2:28 pm
Posts: 504
hello,
sounds like a problem of the flashloader.
try to use the j-link flashloader.
select options => debugger => download and uncheck "use flash loader".
now the j-link flashloader should be used.
eventually update j-link driver.

regards
gerhard


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