I am considering designing a low cost eval board for the AT91SAM7 family. It will be much like the IAR eval board, but will include 10/100 Ethernet as well. It will have a small FPGA to provide the glue to the SMSC LAN91C111 Ethernet chip and will also provide significant user IO and/or a PC/104 interface.

The selling price target is $99 and I expect it will be bundled with an eval version of the ImageCraft ICCV7 tools (fully functional for 45 days then limitated code size). Does this sound interesting to people here?

I almost forgot to mention that I plan to have it supported under the Ethernut software (open source).

I have started a Yahoo group to discuss these chips. I guess it duplicates the function of this forum, but a lot of people don't care for web forums.

http://groups.yahoo.com/group/AT91SAM7/

Also, please check out the GNU ARM tools at http://www.gnuarm.com Both source and binary distributions for Windows (Cygwin), Linux and MacOS are available.
.

Why pc104? My understanding is to market a product with that designation requires paying license fees to the organization? Most Industrial guys that build their own do it only for in-house without advertising "PC-104."

Also, I am sure you have some customers in mind, but generally I would think taking some of the uIP style projects and EDTP philosophy of no glue chips would be best since it produces the lowest cost solution. You will not be managing 100Mb traffic anyway, so it's more for simple communication on a protected network anyway, right?

You know there is scheduled a SAM7X product family that has ethernet 10/100 MAC on board + AES hardware block in place of the USB device? It is supposed to be out mid/late year.

No, there are no license fees for PC/104. If you want to join their organization, you have to pay an annual fee, but that has nothing to do with making products. That just gives you voting rights.



Yes, we have a PC/104 product line and I expect to build this board using a similar design to our new "standard" interface. I guess I am not trying to make it for the lowest dollar because Olimex will do that better than I could. So I am trying to make a board that will appeal to users who need a bit more performance and/or can use some extra functionality, such as a customizable FPGA. The PC/104 connector can be used as a 90 bit custom IO port if they want.



Thanks, I didn't know that. I don't see any info on the web site about it. Was there a press release?

Thanks for the information - I had been misinformed about the PC/104 situation.

The SAM7X family was introduced in the whole SAM7 press release. First one that came up for me on a web search was:
http://deviceforge.com/news/NS6091680867.html

Search on AT91SAM7X128 for more? It is going to be nice since it looks like it will cost less and be more readily available then the ASIX/Realtek MACs themselves!

I know you asked it in a seperate question - but since I cannot answer all of the question:
Atmel is advertising a max throughput of 12.5Mb/s on the SSC. Since the datasheet goes back and forth between freq. being 50MHz or 55MHz, I think it is the div/4 actual throughput like you suggest.

If you plan to put the core to the ultra low power mode of 500Hz, it is expected that the ADC and Peripherals are de-activated (per the datasheet).

Now I remember seeing a product brouchure showing the full family. But I don't expect to see even samples on this part until second half of this year. The literature says the other parts should be in full production now and I still have not figured out how to even get samples. I have sent three messages and am still waiting for a reply.

As to the cost, I am amazed at the prices of some of the LAN chips. I am planning to use the SMSC LAN91C111 chip, but it is nearly $20 unless I can get some relief from a disti. Of course, all savings will be passed onto the customer ;^) Actually, it is going to be tough to build this board the way I want to sell at $99, but I am going to do my best. I just hope the volumes are there to get good pricing from the distis.




I don't expect to pull it all the way down to 500 Hz, but 1 MHz might be nice. I believe that brings the core current to the low mA range. I'll just have to make sure I design the SSC interface in the FPGA to work with that.

Too bad about the SSC speed being 12.5 Mbps. I was hoping it would be the higher 25 Mbps. Without an external data bus, the SSC seems like the fastest way to get data in/out of the FPGA and Ethernet chips. But in reality, 100 Mbps Ethernet does not get anywhere near that in a real network. So 12.5 Mbps won't be a major drag.