Hi everyone,

I'm currently developing a new hardware with the AT91M55800A controller. I'm using the SPI bus. I have connected two AD7887 a/d converter chips to the bus. The a/d converters are connected to NPCS0 and NPCS1 chip selects. The PDC is setup to run 200 conversions. The transmitter buffer contains 200 32 bit words which contain the a/d control words (lower 16 bits) and the appropriate chip select values (bits 16...19). The setup is done in a way so that the a/d converters are accessed in an alternating manner, i.e. NPCS 0 - 1 - 0 - 1 ...
The PDC is also setup to receive the results. When the PDC has transmitted the 200th word, an interrupt occurs. Within this interrupt, I also check the status of the PDC SPI receiver counter (which is zero) and the PDC SPI receiver pointer (which is original programming + 4 * 200), which look ok.

However, the receiver buffer contains the results not in the same order as the transmitter buffer did (0 - 1 - 0 - 1 ...), but swapped (1 - 0 - 1 - 0 ...). I'm completely stuck about what I could have done wrong. Initiating the sequence is done as follows:
* Is RDRF cleared?
* Abort if not!
* Setup receiver pointer
* Setup receiver count (nothing happens because no transmission...)
* Setup transmitter pointer
* Setup transmitter count (transmission starts, therefore reception starts)

Did anybody ever came across a similar problem?

Thanks for your suggestions,

Markus Klama