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 Post subject: AT91SAM7A3 SSC TX problem
PostPosted: Mon Mar 30, 2009 7:45 pm 
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Joined: Mon Mar 30, 2009 7:18 pm
Posts: 3
I’m using AT91SAM7A3 in a telecom board, connected to a E1 chip (Infineon FALC56 if it matters). AT91SAM7A3 has to simultaneously receive and transmit voice data via serial lines at 2.048 MHz. SSC seems to be perfect for this task, as it’s flexible and can use DMA transfers.

TX/RX is done with 256 bit frames – one frame each 125 mcs.

Receive is not a problem. FALC56 provides me with 2.048 MHz clock, data and frame sync signals which go to RK1, RD1 and RF1 respectively. SSC1 is programmed as follows:

Code:
AT91S_SSC* pSSC1 = AT91C_BASE_SSC1;
pSSC1->SSC_RCMR = AT91C_SSC_CKS_RK | AT91C_SSC_CKI | AT91C_SSC_START_FALL_RF;
pSSC1->SSC_RFMR = 31 | (7 << 8);


Then I enable PDC and setup two 1024-byte buffers. Everything works fine.

However, doing transmit part is a problem. I want to use clock from RK1 pin and output it on TK1. I also want to generate a negative sync pulse on TF1 every 256 bit (as with receive).

First, I can’t get any output signals on TK1, TF1 and TD1 unless I assign these pins to peripheral B:

*AT91C_PIOB_BSR = AT91C_PB12_TD1 | AT91C_PB9_TK1 | AT91C_PB8_TF1;

I can’t seem to find this in the datasheet, but perhaps I’m just missing it?

Transceiver is configured as:

Code:
pSSC1->SSC_TCMR = AT91C_SSC_CKS_TK | AT91C_SSC_CKO_CONTINOUS | AT91C_SSC_CKI | AT91C_SSC_START_TX;
pSSC1->SSC_TFMR = 31 | (7 << 8) | AT91C_SSC_FSOS_NEGATIVE;


If I try to synchronize transmit and receive using AT91C_SSC_START_TX flag in SSC_TCMR, it just never starts. I was hoping that this would start a transfer each time the receiver is receiving a frame?

If I try to remove AT91C_SSC_START_TX and run TX in continuous mode, no sync pulse is generated on TF1. When I try to set PERIOD field in SSC_TCMR:

Code:
pSSC1->SSC_TCMR = AT91C_SSC_CKS_TK | AT91C_SSC_CKO_CONTINOUS | AT91C_SSC_CKI | (127 << 24);


sync pulses are being generated every 256 bits as needed, but are completely misaligned with data. It seems that they are not synchronized with the data bits transmitted.

Any suggestions? I would really appreciate a working code sample, thank you!


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 Post subject: Re: AT91SAM7A3 SSC TX problem
PostPosted: Tue Mar 31, 2009 11:03 am 
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Joined: Tue May 15, 2007 5:24 am
Posts: 5
ping111 wrote:
I’m using AT91SAM7A3 in a telecom board, connected to a E1 chip (Infineon FALC56 if it matters). AT91SAM7A3 has to simultaneously receive and transmit voice data via serial lines at 2.048 MHz. SSC seems to be perfect for this task, as it’s flexible and can use DMA transfers.

TX/RX is done with 256 bit frames – one frame each 125 mcs.

Receive is not a problem. FALC56 provides me with 2.048 MHz clock, data and frame sync signals which go to RK1, RD1 and RF1 respectively. SSC1 is programmed as follows:

Code:
AT91S_SSC* pSSC1 = AT91C_BASE_SSC1;
pSSC1->SSC_RCMR = AT91C_SSC_CKS_RK | AT91C_SSC_CKI | AT91C_SSC_START_FALL_RF;
pSSC1->SSC_RFMR = 31 | (7 << 8);


Then I enable PDC and setup two 1024-byte buffers. Everything works fine.

However, doing transmit part is a problem. I want to use clock from RK1 pin and output it on TK1. I also want to generate a negative sync pulse on TF1 every 256 bit (as with receive).

First, I can’t get any output signals on TK1, TF1 and TD1 unless I assign these pins to peripheral B:

*AT91C_PIOB_BSR = AT91C_PB12_TD1 | AT91C_PB9_TK1 | AT91C_PB8_TF1;

I can’t seem to find this in the datasheet, but perhaps I’m just missing it?

Transceiver is configured as:
no, TCMR not set to "0x1 RK Clock signal" and "0x1 Continuous Transmit Clock Output" at the same time.
Code:
pSSC1->SSC_TCMR = [color=#FF0040]AT91C_SSC_CKS_TK | AT91C_SSC_CKO_CONTINOUS [/color]| AT91C_SSC_CKI | AT91C_SSC_START_TX;
pSSC1->SSC_TFMR = 31 | (7 << 8) | AT91C_SSC_FSOS_NEGATIVE;


If I try to synchronize transmit and receive using AT91C_SSC_START_TX flag in SSC_TCMR, it just never starts. I was hoping that this would start a transfer each time the receiver is receiving a frame?

If I try to remove AT91C_SSC_START_TX and run TX in continuous mode, no sync pulse is generated on TF1. When I try to set PERIOD field in SSC_TCMR:

Code:
pSSC1->SSC_TCMR = AT91C_SSC_CKS_TK | AT91C_SSC_CKO_CONTINOUS | AT91C_SSC_CKI | (127 << 24);


sync pulses are being generated every 256 bits as needed, but are completely misaligned with data. It seems that they are not synchronized with the data bits transmitted.

Any suggestions? I would really appreciate a working code sample, thank you!


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 Post subject: Re: AT91SAM7A3 SSC TX problem
PostPosted: Tue Mar 31, 2009 11:10 am 
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Joined: Tue May 15, 2007 5:24 am
Posts: 5
you can use TK input from RK out, TF input from RF out, to solve sync problem.


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 Post subject: Re: AT91SAM7A3 SSC TX problem
PostPosted: Tue Mar 31, 2009 12:25 pm 
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Joined: Mon Mar 30, 2009 7:18 pm
Posts: 3
Thank you for your suggestions!

huatuizh wrote:
no, TCMR not set to "0x1 RK Clock signal" and "0x1 Continuous Transmit Clock Output" at the same time.

I have changed this to:
Code:
pSSC1->SSC_TCMR =AT91C_SSC_CKS_TK | AT91C_SSC_CKO_DATA_TX | AT91C_SSC_CKI | AT91C_SSC_START_TX;

still, the result is the same :x
huatuizh wrote:
you can use TK input from RK out, TF input from RF out, to solve sync problem.

Unfortunately RF is an input with active-high pulses and TF should be an output with active-low pulses :(


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 Post subject: Re: AT91SAM7A3 SSC TX problem
PostPosted: Wed Jul 29, 2009 5:41 am 
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Joined: Tue May 15, 2007 5:24 am
Posts: 5
hardware connection like this:

7A3 E1 LIU/framer
RX
RD <---------------
RF <---------------
RK <---------------
TX ______ |
TK ______ |----->
TF --------------->
TD --------------->

TCMR is set to "0x1 RK Clock signal", so TK pin can be NC.
TCFR is set according to your E1 chip.


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 Post subject: Re: AT91SAM7A3 SSC TX problem
PostPosted: Wed Jul 29, 2009 9:11 am 
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Joined: Mon Mar 30, 2009 7:18 pm
Posts: 3
Don't really understand how it should work, but thanks anyway!

The project is finished, we ended up with wiring RF and TF, RK and TK together as you suggested
and changing E1 framer mode accordingly.


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