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| Help: SAM3S4C DAC with DMA http://www.at91.com/samphpbb/viewtopic.php?f=24&t=19545 |
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| Author: | m4r10guapito [ Fri Sep 10, 2010 10:57 am ] |
| Post subject: | Help: SAM3S4C DAC with DMA |
Hi people, I'm using the Arm in subject. I would like to use DAC with DMA(PDC) but I don't found examples about it. Could you write a little example or explain how to make it please? Thanks in advance Mario |
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| Author: | bm31416 [ Tue Sep 21, 2010 4:31 pm ] |
| Post subject: | Re: Help: SAM3S4C DAC with DMA |
I did it for the U series. see if it fits. the ADC is actived by the TC. sorry, but I dont have time to clean the code, so just I pasted it all. //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- void Config_AD12B(void) { AT91C_BASE_PIOA->PIO_PDR = AT91C_PIO_PA22 + AT91C_PIO_PA30; AT91C_BASE_PIOB->PIO_PDR = AT91C_PIO_PB3 + AT91C_PIO_PB4; AT91C_BASE_PIOC->PIO_PDR = AT91C_PIO_PC15 + AT91C_PIO_PC16 + AT91C_PIO_PC17 + AT91C_PIO_PC18; AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_ADC12B; AT91C_BASE_ADC12B->ADC12B_CR = AT91C_ADC_SWRST; AT91C_BASE_ADC12B->ADC12B_MR = AT91C_ADC12B_MR_TRGEN_EN + AT91C_ADC12B_MR_TRGSEL_TIOA_2 + AT91C_ADC12B_MR_LOWRES_12_BIT + AT91C_ADC12B_MR_SLEEP_NORMAL + (0 << (10 << 16) + //AT91C_ADC12B_MR_STARTUP (4 << 24); //AT91C_ADC12B_MR_SHTIM //10 AT91C_BASE_ADC12B->ADC12B_CHER = AT91C_ADC12B_CHER_CH0_ENABLE + AT91C_ADC12B_CHER_CH1_ENABLE + AT91C_ADC12B_CHER_CH2_ENABLE + AT91C_ADC12B_CHER_CH3_ENABLE + AT91C_ADC12B_CHER_CH4_ENABLE + AT91C_ADC12B_CHER_CH5_ENABLE + AT91C_ADC12B_CHER_CH6_ENABLE + AT91C_ADC12B_CHER_CH7_ENABLE; AT91C_BASE_ADC12B->ADC12B_RCR=1; // Prevents a first not wanted interrup from DMA AT91C_BASE_ADC12B->ADC12B_IER = AT91C_ADC12B_IER_ENDRX_ENABLE; //AT91C_BASE_ADC12B->ADC12B_IER = AT91C_ADC12B_IER_EOC7_ENABLE; IRQ_ConfigureIT(AT91C_ID_ADC12B, 0, ADCC0_IrqHandler); IRQ_EnableIT(AT91C_ID_ADC12B); } //----------------------------------------------------------------------------- //----------------------------------------------------------------------------- void Configure_TC(void) { AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC2); AT91C_BASE_TC2->TC_CMR = AT91C_TC_CLKS_TIMER_DIV1_CLOCK + AT91C_TC_BURST_NONE + AT91C_TC_WAVESEL_UP_AUTO + AT91C_TC_WAVE + AT91C_TC_ACPA_SET + AT91C_TC_ACPC_CLEAR; AT91C_BASE_TC2->TC_RA = 749; AT91C_BASE_TC2->TC_RC = 750; //AT91C_BASE_TC2->TC_RA = 360; //AT91C_BASE_TC2->TC_RC = 375; //AT91C_BASE_TC2->TC_RA = 0xFFE0; //AT91C_BASE_TC2->TC_RC = 0xFFE9; } //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ void ADCC0_IrqHandler(void) { if((AT91C_BASE_ADC12B->ADC12B_SR & AT91C_ADC12B_IER_ENDRX_ENABLE) != AT91C_ADC12B_IER_ENDRX_ENABLE) return; if(ADC_BUFFER_CTRL.buff_full==ADC_BUFFER_1_FULL) { ADC_BUFFER_CTRL.buff_full=ADC_BUFFER_2_FULL; AT91C_BASE_ADC12B->ADC12B_RPR=(unsigned int)ADC_BUFFER_CTRL.adc_buffer [ADC_BUFFER_1] ; } else if(ADC_BUFFER_CTRL.buff_full==ADC_BUFFER_2_FULL) { ADC_BUFFER_CTRL.buff_full=ADC_BUFFER_1_FULL; AT91C_BASE_ADC12B->ADC12B_RPR=(unsigned int)ADC_BUFFER_CTRL.adc_buffer [ADC_BUFFER_2]; } /*buff_in[0]=AT91C_BASE_ADC12B->ADC12B_CDR[0]; buff_in[1]=AT91C_BASE_ADC12B->ADC12B_CDR[1]; buff_in[2]=AT91C_BASE_ADC12B->ADC12B_CDR[2]; buff_in[3]=AT91C_BASE_ADC12B->ADC12B_CDR[3]; buff_in[4]=AT91C_BASE_ADC12B->ADC12B_CDR[4]; buff_in[5]=AT91C_BASE_ADC12B->ADC12B_CDR[5]; buff_in[6]=AT91C_BASE_ADC12B->ADC12B_CDR[6]; buff_in[7]=AT91C_BASE_ADC12B->ADC12B_CDR[7];*/ AT91C_BASE_ADC12B->ADC12B_RCR=ADC_SIZE_BUFFER; ADC_BUFFER_CTRL.adc_buff_state=ADC_BUFFER_FULL; AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC9; AT91C_BASE_PIOC->PIO_SODR = AT91C_PIO_PC9; // AT91C_BASE_PIOA->PIO_CODR = AT91C_PIO_PA0; // AT91C_BASE_PIOA->PIO_SODR = AT91C_PIO_PA0; } //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ void Config_TC2_ADC12B_PDC(void) { AT91C_BASE_ADC12B->ADC12B_PTCR=1; Configure_TC(); Config_AD12B(); Disable_ADC_TC_PDC(); } //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ void Enable_ADC_TC_PDC (void) { ADC_BUFFER_CTRL.adc_buff_state=ADC_BUFFER_EMPTY; ADC_BUFFER_CTRL.buff_full=ADC_BUFFER_2_FULL; AT91C_BASE_ADC12B->ADC12B_RPR=(unsigned int)ADC_BUFFER_CTRL.adc_buffer [ADC_BUFFER_1] ; AT91C_BASE_ADC12B->ADC12B_RCR=ADC_SIZE_BUFFER; AT91C_BASE_TC2->TC_CCR = AT91C_TC_SWTRG +AT91C_TC_CLKEN; } //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ void Disable_ADC_TC_PDC (void) { AT91C_BASE_TC2->TC_CCR = AT91C_TC_CLKDIS; } //------------------------------------------------------------------------------ //------------------------------------------------------------------------------ |
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| Author: | bdenis [ Mon Oct 04, 2010 3:10 pm ] |
| Post subject: | Re: Help: SAM3S4C DAC with DMA |
Hi, You can have a look at the new software package available on www.atmel.com. The USB audio demo (to get the SAM3S-EK behaving as an USB audio card with the internal ADC and DAC) uses the PDC of the DAC. Hope it helps. Regards, bdenis |
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