Hi,
I'm working on the same board as csagonero.
Code:
void BOARD_ConfigureSdram(unsigned char busWidth)
{
[[ send me a PM for futher information ]]
}
I checked at least ten times my code.
So, i tried to bypass the ExtRAM_TestOk test so that it returns always 1.
Sam-ba tells that it succeed in initializing sdram.
Then I tryed to send on the SDRAM the at91sam9g10 datasheet wich is about 11MB.
I used the "compare sent file with memory" tool, it told me that it was the same thing.
I read the data into a new pdf file wich, indeed, was good.
So i don't understand why the ROM (Sam-Ba) can interact with sdram, whereas my applet in sram do not.
We have 2 at91sam9260-ek.
We notices that several sources running on at91sam9260ek has code wich does not correspond to the comments.
They often configure LMR by writing some datas on SDRAM_BASE_ADDR (0x20000000) whereas we can read in the sdram's datasheet that at least CAS Latency has to be configured with the value 2 or 3.
Maybe am i missing something about the hardware operations.
We modified the configuration value in void BOARD_ConfigureSdram(unsigned char busWidth).
Seeing that it had no real effects we did this
Code:
void BOARD_ConfigureSdram(unsigned char busWidth)
{
volatile unsigned int i;
static const Pin pinsSdram = PINS_SDRAM;
volatile unsigned int *pSdram = (unsigned int *) AT91C_EBI_SDRAM;
unsigned short sdrc_dbw = 0;
unsigned int tmp = 0;
switch (busWidth) {
case 16:
sdrc_dbw = AT91C_SDRAMC_DBW_16_BITS;
break;
case 32:
default:
sdrc_dbw = AT91C_SDRAMC_DBW_32_BITS;
break;
}
// Enable corresponding PIOs
PIO_Configure(&pinsSdram, 1);
// Enable EBI chip select for the SDRAM, VDDIOMSEL set: memories are 3.3V powered
tmp = READ(AT91C_BASE_MATRIX, MATRIX_EBI) | AT91C_MATRIX_CS1A_SDRAMC;
WRITE(AT91C_BASE_MATRIX, MATRIX_EBI, tmp);
// CFG Control Register
WRITE(AT91C_BASE_SDRAMC, SDRAMC_CR, AT91C_SDRAMC_NC_9
| AT91C_SDRAMC_NR_13
| AT91C_SDRAMC_CAS_2
| AT91C_SDRAMC_NB_4_BANKS
| sdrc_dbw
| AT91C_SDRAMC_TWR_2
| AT91C_SDRAMC_TRC_7
| AT91C_SDRAMC_TRP_2
| AT91C_SDRAMC_TRCD_2
| AT91C_SDRAMC_TRAS_5
| AT91C_SDRAMC_TXSR_8);
/*///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// comment this on a desperate attempt to understand how it does work...
for (i = 0; i < 1000; i++);
[...]
WRITE(AT91C_BASE_SDRAMC, SDRAMC_TR, (BOARD_MCK * 7) / 1000000); // Set Refresh Timer
*////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// comment this on a desperate attempt to understand how it does work...
WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_NORMAL_CMD); // Set Normal mode
pSdram[0] = 0x00000000; // Perform Normal mode
}
compiled successfuly
loaded on the target
run ...
It works fine ...
Guess why ... probably one of the unpredictable cases.
Any clue is welcome.
Best regards.
PS :
My Toolchain works well, i built it with openembedded.
I had some trouble with "__rent" undefined, "vprintf" defined two times, or "__aeabi__uidiv" undefined, etc.
I managed to solve it by adding missing elements (__aeabi__uidiv, __div0, ...) or by passing the others (__rent, __aeabi_idiv, ...)
I also added the "-nostdlib" token in LDFLAGS so that it does not link against my gcc-coss libs but only the objects files provided in the utilities of sam-ba applets.