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 Post subject: Resetting PLLA clock on AT91SAM9263-EK
PostPosted: Fri Aug 21, 2009 3:12 pm 
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Joined: Tue Jul 07, 2009 7:27 pm
Posts: 7
I'm trying to run an app from NOR flash, which makes conventional debugging means difficult.

The program seems to get hung up when I try to specify a reset of the PLLA clock:

Code:
AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLLA_CLK;

... but it's okay when I attempt to reset the main clock:

Code:
AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_MAIN_CLK;

... as judged by telling an LED to flash whenever the board is running.

It's the only thing that changes between the two code bases. I imagine that changing the PLLA clock is, in some sense, telling it to change the clock it's running on while it's running. Can someone refer me to a way to change a clock in midstream? I'd like to make sure I'm taking care of all the things I need to in order to make sure that I haven't left something out.

Thanks for any help you can provide.


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 Post subject: Re: Resetting PLLA clock on AT91SAM9263-EK
PostPosted: Tue Aug 25, 2009 7:00 pm 
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Joined: Tue Jul 07, 2009 7:27 pm
Posts: 7
If it helps, you might be interested to know that the code runs just fine from SDRAM but "hangs" when booting from NOR flash. Unfortunately, I can't use the JTAG debugger when I'm booting from NOR flash; I'd appreciate any help that anyone might be able to offer.


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