|
Hi Frank Lee,
As Armulator answered you previously, you have to check some setting at different level:
1) At Core level => the cache memories must be enabled,
2) At µcontroller level (PMC)=> the core clock will be 3 time higher than the bus,
3) At core level => the processor does not be set in Fast Bus Clock, but, in asynchronous mode. In the case of the core is in Fast Bus, the core is working only with the bus clock and not the 3x[bus clock frequency] as wanted !!
The CP15 is the feature which allows to check these previous setting (point 1) and 3)) at ARM920T level.
Bye everybody
|