Hi All,

I have a custom board with SAM9G45, the schematics are based on G45-ekes development board. I'm having a problem with the DDRAM init. Here are the details:

- Using SAM-BA I loaded the isp-extram-at91sam9g45.bin to SRAM (via JTAG). On serial port I see that the applet exits with status code 0xf which means DDR_Test failed. Reading from 0x70000000 returns 0xFFFF always. Write does have any effect.

- Init is writing to the correct DDRC regs (0xFFFFE600) and I can see the registers restored to reset values upon reset.

- The exact same extram applet works on the G45-EKES board I have and I'm able to read/write to DDR location.

- DDR connections are exactly the same as G45-ekes. Proper care was taken while designing the board so I doubt it's a h/w fault.

I've tried using slower settings for DDR T0 & T1 timing registers and also increasing delays where mentioned in datasheets, no access. The same applet is able to init ddr on g45-ekes board so there doesn't seem to be anything wrong with the code.

Clock is measured to be 133Mhz on the CLK line of DDR chip. DDR Part number is same as G45-EKES, Micron part MT47H64M8CF-3. Apart from h/w faults, what can cause the DDR init to fail? Is there anything else to be setup before/after extram applet?

Also, is it possible the the DDRAM is init'ed properly but not mapped to 0x70000000 address somehow or it has to be explicitly mapped after init?

Hello hunter107,

I was wondering if you found a solution to your issue. I have a customer who also requires a custom ARM solution for a project.
We are considering the 9G45, but are worried/curious if there are unknown issues.

Kindest Regards,

Timothy

Hi Timothy,

It turned out to an assembly problem. DDR works fine on G45. We have DDR2 connected to DDRSC as well as on EBI controller (chip select 1) and both work fine without problems.

If you have G45 marked with CU-ES2 marking, there should be no trouble at all.

Hi hunter107,

I'm having problems (Linux page faults) when I use 256MB of DDR2 on custom board with AT91SAM9G45. When I use only 128MB (with DDRSDRC mapped at 0x70000000) then there is no software faults, but when I want to use 256MB (DDRSDRC: 128MB + EBI_CS1: 128MB) then this page fault with linux starts.

I'm using Linux 2.6.32.

I have checked the timing parameters (DDR2 initialisation) in Boot strap but did not find any anamoly. I have also enabled both memory banks in UBoot.

Can you pls suggest, where could be the problem: AT91Bootstrap, UBoot, Linux?

Which params did you tweak to get 256MB working?

Thanks in advance.

-PJ