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 Post subject: Understanding AT91SAM9G45 EMAC DMA Interrupts Setup
PostPosted: Tue Mar 29, 2011 6:03 pm 
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Joined: Wed Jan 19, 2011 6:09 pm
Posts: 9
Hi all,

i am very knew to Ethernet. I need to get a better understanding for the function of the EMAC interrupts. What I understand from the datasheet is that it is possible to setup 1024 x 128byte buffers in a RAM. The DMA inside the MAC automatically transmits the recieved data into the buffers. But when does it signal me that it has finished its transfers. What I see from the datasheet is that it is possible to receive an interrupt every time a fulll frame has been received. Does that mean I get an interrupt every 1542 byte (Ethernetframe) when always receiving full Ethernetframes? Is there a possibilitie to tell the DMA or EMAC only signal me when you've received e.g. 45 full frames (1542bytes x 45)? The Buffersize should make up for at least 85 full frames (1024x128 byte). I am very confused by the datasheet and my lack of knowledge there.


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 Post subject: Re: Understanding AT91SAM9G45 EMAC DMA Interrupts Setup
PostPosted: Wed Mar 30, 2011 11:09 pm 
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Joined: Sat Sep 11, 2010 1:32 am
Posts: 23
I just finished adding Ethernet support on the AT91SAM9G45 to my custom bootstrap code. I am planning on getting rid of U-Boot in order to improve boot speed and field upgrades if the kernel or RFS is destroyed in the fields.

So, An Ethernet frame is any Ethernet packet which could be as small as 64 bytes (ARP packet), mid size IP/ICMP Ping packet, or full blown packets in the 1500 byte range depending on MTU size. Since my custom Ethernet driver is executing in the bootstrap and I only have 64 KBytes to execute code out of and use for buffers, I only used 16 hardware buffers of 128 bytes each. I did this for RX and again for TX.

The DMA engine will move chunks out of an Ethernet packet from the physical Ethernet peripheral in at most 128 byte chunks. You can set an interrupt when any of these smaller DMA moves happen or you can set an interrupt when a full frame has happened.

I am actually polling the "(read_emacb(EMAC_RSR) & AT91C_EMAC_REC)" to see if I have at least one frame in my ring buffers for processing. I did this because I do not want interrupts alive in the bootstrap and I leave the interrupts to Linux for enabling.

Summary
Hardware has a single 128 byte RX FIFO
DMA must move this into you Ring buffers setup as soon as a small (< 128 byte) packet is received or as soon as 128 bytes are received in a larger packet.
DMA will keep incrementing buffer pointers and filling your ring buffers as it needs
You can get an interrupt when an Ethernet frame is received (not a TCP/UDP packet which can be much much larger). The hardware only knows Ethernet frames.
You need to unload your ring buffers in a timely manner and reset them for use by the DMA engine.

Transmitting is easier but similar idea.

- Gary


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 Post subject: Re: Understanding AT91SAM9G45 EMAC DMA Interrupts Setup
PostPosted: Wed Apr 06, 2011 4:56 pm 
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Joined: Wed Jan 19, 2011 6:09 pm
Posts: 9
Thank you very much for your reply.

It really helped me out to understand the handling of my Ether-Frames.


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