Hi all:

I am working on 9260 with vxworks.
When I operating EMAC interface, I follow 9200's project.
1. alloc memory for TX and RX
2. enable PMC_PCER for EMAC
3. set EMDC clock to EMAC_NCFG_CLK_HCLK_32, then visit PHY fetch chip ID
4. set PIO for MII
5. reset PHY via NRST, then wait for PHY link up, and set EMAC_NCFG with correct FD &

speed.
6. initialize tx&rx buffer and discripetor
7. set MAC address
8. start EMAC:enable TE&RE, set IER, connect ISR

the PHY works fine when PC ping board, the rxck and rxd signal is good. but no any RCOMP or

else interrupt occur.

when board pings PC, the EmacSend function copy data into fifo, and set unused flag, and

set TSTART, no any interrupt occurs also.

I don't know why? If I miss something?

One intresting thing, when I send data, if I

today I reset PHY after pull down PIO, the status changes.
the TXUBR bit in TSR disappears, the the TGO always in TSR.