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The NRST has an internal ~100K pull-up to VDDIOP.
You could check the voltage without the external pull-up, and check the supply side of the external pull-up.
You could check your external power-planes, and verify they are all connected and you don't have un-powered islands, or power back-feeding from other parts. Try probing an unpopulated PCB, or the solder-sample board.
If you have access to an xray inspection tool, you could check the BGA for voids/shorts.
The problems I've seen with people and NRST signals is where they actively drive them high, and internally the OC driver is trying to clamp them low, and they fight.
If it's clamped internally with just an external pull-up, it's going to be darn near zero.
Is the capacitance you measure on a raw device, or on the board. If on the board you are probably measuring the bulk/decoupling capacitors via the VDDIOP it's internally pulled up to.
Back to the original suggestions, validate that the boot against other devices is occurring (ie probe attempts). Jumper BMS so it tries to boot an external NOR, and validate if the EBI accesses are occurring.
Like I said, if the part is running stable enough to print "ROMBoot", and not constantly rebooting, I'm not sure NRST is even your real problem here, although it not being 3.3V is admittedly a tad odd. Just don't focus on it, go validate that other parts of the board are at the correct voltages, and the other pins are doing what might be expected, or not. By eliminating what is working, you might get closer to discovering what isn't and why.
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