I got some reply from previous post , That The tftp load address and U-boot load address should not be same.So I have used the tftp load address 0x22200000.



TFTP from server 192.168.1.105; our IP address is 192.168.1.51
Filename 'uImage.bin'.
Load address: 0x22200000
Loading: ##########################################################
done
Bytes transferred = 1717572 (1a3544 hex)
U-Boot> bootm
## Booting kernel from Legacy Image at 23300000 ...
Image Name: Angstrom/2.6.30/at91sam9g20ek
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 1717508 Bytes = 1.6 MB
Load Address: 20008000
Entry Point: 20008000
Verifying Checksum ... OK
Loading Kernel Image ... OK
OK

Starting kernel ...

Uncompressing Linux.............................................................
............................................... done, booting the kernel.
Its hanged here.
Its not moving further.Please help me to proceed.

> I got some reply from previous post

You're welcome.
Oh wait, you never said thanks.
Never mind.
Good luck.

Regards

>>Its not moving further. Please help me to proceed.

Learn how to use a hardware/JTAG debugger, unless you can pinpoint the problem, you're going to be wasting hours staring at a blinking cursor. Not much insight to be gained from that.

With the amount of information you're provided, you are basically hoping for some enlightened guessing.

We have u-boot loading our kernel at 0x22000000, with the load/entry at 0x20008000



NAND read: device 0 offset 0x200000, size 0x200000
2097152 bytes read: OK
## Booting kernel from Legacy Image at 22000000 ...
Image Name: Linux-2.6.36.2
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 1711828 Bytes = 1.6 MiB
Load Address: 20008000
Entry Point: 20008000
Verifying Checksum ... OK
Loading Kernel Image ... OK
OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
Linux version 2.6.36.2
CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
CPU: VIVT data cache, VIVT instruction cache
Machine: Atmel AT91SAM9G20-EK
Memory policy: ECC disabled, Data cache writeback
Clocks: CPU 396 MHz, master 132 MHz, main 18.432 MHz

[quote="blue_z"]> I got some reply from previous post

You're welcome.
Oh wait, you never said thanks.
Never mind.
Good luck.

Regards[/quote]


Thank you.