Joined: Mon Apr 06, 2009 6:58 am Posts: 5
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In the process of laying out a custom board for 9g20. What are poeple using for pcb stack-up impedance for BGA. The app note "Signal Integrity and Power Integrity Analysis around the SDRAM Bus Activity Using AT91SAM9260 Microcontrollers" on page 34 suggests 75 ohm. But the app note suggest the effective net ZO to the SDRAM chip should be around 50 ohms. So why isn't the board stack-up impedance 50 ohms?
Should the data lines to the SDRAM chip be made the same length? What about the address lines?
Any tips or suggestions for laying out the SDRAM (2 SDRAM chips 16M x16 - TSSOP) and NAND Flash (TSSOP).
Should the USB lines be layed out as a differential pair of 90 ohms?
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