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Hi,
I have configured USART3 of AT91SAM9xe in synchronous 6-bit mode with external clock source.
An I/O as external interrupt source, with an ISR which simply puts a character(6-bit value) in THR register of USART.
The problem is that i do not see data on TXD right after writing to THR, but its one complete cycle delayed which destroys all the timing at the receive device.
What i dont understand is why is there a delay between THR write and data on TXD?
Diagram: is attached
[attachment=0]usart.GIF[/attachment]
attaching the code written in IAR
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usart.GIF [ 2.65 KiB | Viewed 644 times ]
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File comment: the rar file contains an IAR project which behaves as mentioned in the post.
I cannot figure out why is there a delay between THR write and data on TXD
usart2.rar [1.71 MiB]
Downloaded 15 times
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