Hi All,

I observed strange reset behaviour on my few boards having AT91SAM9G45.
Sometimes processor doesn't insert output NRST pulse after soft reset/user reset and that time uboot image data read by bootstrap are different than actually written in NAND flash. So, Uboot execution is not working.

In some boards, it is also observed that whenever the pulse duration of user RESET that is given to processsor is larger than 230mS, the issue is "uboot image data read by bootstrap are different than actually written in NAND flash. So, Uboot execution is not working".

Awaiting for expert's comments/suggestions and help.

Regards,
Yash

The earlier generation of AT91SAM devices have a 4-stage boot sequence:

RESET invoked ROMBoot,
which in turn loaded & executed AT91SAMBootstrap,
which in turn loaded & executed U-Boot,
which in turn loaded & executed the OS (e.g. Linux).

Is the reset sequence different on your "few boards"?

Regards

Seeing as it gets to the point of loading uBoot, one might reasonable presume that AT91BootStrap is loading successfully into SRAM (you could checksum that), and that your real problem is how you are initializing your SDRAM/DDR, clocks and system.

I'd look very carefully at the SDRAM circuit, the configuration and timings being used. Check you have the geometry, refresh, and initialization sequences correct for the chips you are using, and the speed is as suitable.

I'd look very carefully at the PLL settings, and the stability of the clocks being generated/used by the memory and peripherals.

I'm not hugely familiar with the G45, but other SAM9's come up at 48 MHZ, and then your code in AT91BootStrap gear it up to maximal speed, and initializes the SDRAM/DDR.

Check also your NAND timings on the external bus when running at the higher speed.