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 Post subject: Accuracy of +/- 0.25% for the 48Mhz USB clock
PostPosted: Fri Oct 08, 2004 11:54 am 
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Location: Singapore
Hi,

How does one guarantee the USB clock to be of +/- 0.25% accuracy since the 48Mhz is set by the power management registers?

Rgds,
kas


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 Post subject:
PostPosted: Sat Oct 09, 2004 2:21 pm 
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Hi Kas,

I have not any number because iti saturday and I am at home but, regarding to the oscillator or PLL accuracy, all these are higher accuracy than the +/- 0.25 % requested by the USB Standard. Your board design takes a great part in the final accuracy: power supply noise on analog rail (oscillator, PLL). To evaluate the worst case, in term of frequency accuracy, you have to display the clock signal with a oscilloscope (trig on a rising edge for exemple), and look at jitter on thousandth rising edge and compute teh delta frequency. That is often given in rad (according to the working frequency of the PLL) for the PLL.
I am going to give you number for our PLLs.


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 Post subject:
PostPosted: Tue Oct 12, 2004 7:44 am 
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Thanks scadene for fast reponse even on weekend.

Think I found a sticky (previously by you) at the below link but the paper download link is not working.

http://www.at91.com/www/phpBB2/viewtopic.php4?t=113


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 Post subject:
PostPosted: Tue Oct 12, 2004 8:00 am 
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Hi Kas,

In order to download something you have to put your cursor on the attach and NOT click left but click right and download it. All the attach are in another server. This server is a FTP server it is not possible to display directly an attach.

Hope this helps.


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 Post subject:
PostPosted: Tue Oct 12, 2004 8:11 am 
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Yes, it does work with right click. Thanks.


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 Post subject:
PostPosted: Tue Oct 12, 2004 1:39 pm 
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You're welcome Kas :)
It is always likeable to give some help when I can. I have visited your web site.
Keep up the good work!


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 Post subject:
PostPosted: Tue Oct 12, 2004 5:28 pm 
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Kas,

Now, I can give you some numbers in term of jitter:
- There are a lot of typical jitter, but for worst, the PLL's jitter si 400 mrad rms (0.4 rad rms). Thus, the edge "shifting" could be equal to 0.4 rad rms of the PLL's working frequency.
But this number can not be used like the typical frequency or jitter error for USB peripherals. This electrical data (400 mrad) is given for a long time jitter (more than 1000 PLL's clock cycles). It is not true in our case.


Last edited by stephan_cadene on Wed Oct 13, 2004 10:42 pm, edited 1 time in total.

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 Post subject:
PostPosted: Wed Oct 13, 2004 10:34 pm 
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Hi Kas,

Find in attach a pdf. This pdf shows electrical results about our AT91RM9200-DK board around the performance in term of jitter. I think this is the best answer for you.

Hope this helps


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 Post subject:
PostPosted: Fri Oct 15, 2004 10:47 am 
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hi scadene,

Thank you again for your help and visiting my website. The information is certainly very helpful and proves the USB signalling is good.

Now I will work on other parts of the AT91RM9200... and probably update my website with our stuff I have done.


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