ATSAMA5D27-WLSOM1 EK enable SPI1 on mikrobus

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Marc7909
Posts: 14
Joined: Mon Apr 20, 2020 3:14 pm

ATSAMA5D27-WLSOM1 EK enable SPI1 on mikrobus

Mon May 25, 2020 5:32 pm

Hi,

Could anyone guide me on enabling the spi1 on the WLSOM EK with spidev support

I have read the AN_3253 but can't figure how to map the info to this specific EK and spi1.

Thanks
blue_z
Location: USA
Posts: 2103
Joined: Thu Apr 19, 2007 10:15 pm

Re: ATSAMA5D27-WLSOM1 EK enable SPI1 on mikrobus

Mon May 25, 2020 9:49 pm

Marc7909 wrote: Could anyone guide me on enabling the spi1 on the WLSOM EK with spidev support
There's the Microchip Developer Help on SPI.

Marc7909 wrote: I have read the AN_3253 but can't figure how to map the info to this specific EK and spi1.
You probably need to use the SAMA5D27 SOM1 Kit1 User Guide as well as the ATSAMA5D27-WLSOM1-EK1 User's Guide and SAMA5D2 SoC datasheet to identify and correlate PIO pins with peripherals.

No guide can anticipate what you do not understand.
So rather than ask for someone to compose another guide just for you, why don't you ask a focused question on a single issue?

Regards
Marc7909
Posts: 14
Joined: Mon Apr 20, 2020 3:14 pm

Re: ATSAMA5D27-WLSOM1 EK enable SPI1 on mikrobus

Tue May 26, 2020 10:26 pm

As it turns out, my changes to the device tree were ok. The problem lies deeper...

When changes are made to the device tree, the build does compile it and place a copy in the image folder and one would think all should be good but remember my pps problem...

So in fact after comparing what the binary dtb file in the image folder (using fdtdump) and the device tree on the module (using dtc on target) they are definitely not the same. amazingly triggered by a git pull, and a rebuild my pps tree node was present and the driver loaded. So that leads to the cause, the FIT file (itb)

When the dt-overlay-at91-linux4sam-2020.04-rc4 was introduced and cause a rebuilt of the FIT file and a new itb file was placed in the image folder, then I noticed that it was not updated in following builds and after some digging I realized the device tree used by the kernel was the one that hides within the itb and it it not updated as you change the device tree.

So I deleted the folder dt-overlay and started a build and bang my device tree was in the target and my spi port actually there. Obviously this is a patch and if I missed a better way to get the device tree updated please let me know

You may think I asked for help before doing some digging but 3 days have pass to get here. I am likely not the only one for who device tree and kernel development are less than 0.0001% of our time. I work in a small company where I do all IT and development tasks both on Linux and WIndows. Don't think I can invest the months required to learn all the chip register and all ins and out the device tree, this is exactly the reason for using a SOM with linux support, to get started quickly. When you say No guide can anticipate what I don't understand well I don't understand a SOM EK with two expansion connector where the spi is not enabled and hardly understand a board where there are more critics on questions than actual answer.

Regards
Marc7909
Posts: 14
Joined: Mon Apr 20, 2020 3:14 pm

Re: ATSAMA5D27-WLSOM1 EK enable SPI1 on mikrobus

Wed Jun 03, 2020 12:24 pm

spi1 still dont work...

Changes to device-tree

Code: Select all

&spi1 {
	status = "okay";
  
  pinctrl-name = "default";
	pinctrl-0 = <&pinctrl_spi1_default &pinctrl_mk2_spi_cs &pinctrl_mk1_spi_cs>;
  cs-gpios = <&pioA 68 0>,<&pioA 69 0>,<0>,<0>;
				
	spidev@0 {
    compatible = "atmel,at91rm9200-spidev";
    reg = <0>;
    spi-max-frequency = <5000000>;
  };

	spidev@1 {
    compatible = "atmel,at91rm9200-spidev";
    reg = <1>;
    spi-max-frequency = <5000000>;
  };
};

...

	pinctrl_spi1_default: spi1_default {
    pinmux = <PIN_PC1__SPI1_SPCK>,
      <PIN_PC2__SPI1_MOSI>,
      <PIN_PC3__SPI1_MISO>;
		bias-disable;
	};
	
	pinctrl_mk1_spi_cs: mk1_spi_cs {
		pinmux = <PIN_PC5__SPI1_NPCS1>;
		bias-disable;
	};

	pinctrl_mk2_spi_cs: mk2_spi_cs {
		pinmux = <PIN_PC4__SPI1_NPCS0>;
		bias-disable;
	};
Check if device tree on EK reflects changes

Code: Select all

dtc -I fs -O dts /sys/firmware/devicetree/base

                        spi@fc000000 {
                                compatible = "atmel,at91rm9200-spi";
                                clocks = <0x03 0x02 0x22>;
                                clock-names = "spi_clk";
                                pinctrl-name = "default";
                                status = "okay";
                                #address-cells = <0x01>;
                                interrupts = <0x22 0x04 0x07>;
                                cs-gpios = <0x06 0x44 0x00 0x06 0x45 0x00 0x00 0x00>;
                                #size-cells = <0x00>;
                                dma-names = "tx\0rx";
                                atmel,fifo-size = <0x10>;
                                phandle = <0x5c>;
                                reg = <0xfc000000 0x100>;
                                pinctrl-0 = <0x1e 0x1f 0x20>;
                                dmas = <0x14 0x8004000 0x14 0x9004000>;

                                spidev@1 {
                                        compatible = "atmel,at91rm9200-spidev";
                                        status = "okay";
                                        phandle = <0x5e>;
                                        reg = <0x01>;
                                        spi-max-frequency = <0x4c4b40>;
                                };

                                spidev@0 {
                                        compatible = "atmel,at91rm9200-spidev";
                                        status = "okay";
                                        phandle = <0x5d>;
                                        reg = <0x00>;
                                        spi-max-frequency = <0x4c4b40>;
                                };
                        };
Boot log

Code: Select all

dmesg | grep spi
atmel_spi fc000000.spi: Using dma0chan0 (tx) and dma0chan1 (rx) for DMA transfers
atmel_spi fc000000.spi: Using FIFO (16 data)
spidev@0 enforce active low on chipselect handle
spidev@1 enforce active low on chipselect handle
atmel_spi fc000000.spi: Atmel SPI Controller version 0x311 at 0xfc000000 (irq 39)
spi-nor spi1.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff
spi-nor: probe of spi1.0 failed with error -2
check dev

Code: Select all

ls -al /dev/spi*
crw-------    1 root     root      153,   0 Jun  2 07:06 /dev/spidev0.0
crw-------    1 root     root      153,   1 Jun  2 07:06 /dev/spidev0.1
gpioinfo output (here I would assume PC1..PC3 should be in use but am unsure if this is relevant)

Code: Select all

        line  65:        "PC1"       unused   input  active-high
        line  66:        "PC2"       unused   input  active-high
        line  67:        "PC3"       unused   input  active-high
        line  68:        "PC4"   "spi0 CS0"  output   active-low [used]
        line  69:        "PC5"   "spi0 CS1"  output   active-low [used]
MOSI->MISO loopback

Code: Select all

spidev_test -D /dev/spidev0.0 -v
spi mode: 0x4
bits per word: 8
max speed: 500000 Hz (500 KHz)
TX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D  | ......@....▒..................▒.
RX | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  | ................................
So I am still missing a piece here

Regards
blue_z
Location: USA
Posts: 2103
Joined: Thu Apr 19, 2007 10:15 pm

Re: ATSAMA5D27-WLSOM1 EK enable SPI1 on mikrobus

Tue Jun 09, 2020 1:34 am

Marc7909 wrote: Changes to device-tree
...
Your changes are hard to read. The indentation is haphazard, and there's no context.
The Device Tree is a tree structure, and not an unsorted list. The parent of a node is salient information.
See this post for a readable example of DT changes.

Marc7909 wrote: MOSI->MISO loopback

Code: Select all

spidev_test -D /dev/spidev0.0 -v
spi mode: 0x4
bits per word: 8
max speed: 500000 Hz (500 KHz)
TX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D  | ......@....▒..................▒.
RX | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  | ................................
Did you test without shorting the pins (assuming you did short the proper pins in the first place)?

Try obtaining debug output from the pinctrl subsystem, which requires a kernel reconfiguration, to monitor pin multiplexing.

Regards
Marc7909
Posts: 14
Joined: Mon Apr 20, 2020 3:14 pm

Re: ATSAMA5D27-WLSOM1 EK enable SPI1 on mikrobus

Tue Jun 30, 2020 3:30 pm

Hi,
I am back to this issue, I did enable the debug output for pinctrl. For completeness the CONFIG_LOG_BUF_SHIFT value in the kernel configuration also had to be changed in order not to loose log entries. Had to set it to 18.

This is the output I believe relevant, if other parts are needed I will provide them. Please advise on the output

Code: Select all

pinctrl core: add 6 pinctrl maps
generic pinconfig core: found bias-disable with value 0
pinctrl core: add 2 pinctrl maps
generic pinconfig core: found bias-disable with value 0
pinctrl core: add 2 pinctrl maps
pinctrl-at91-pio4 fc038000.pinctrl: found group selector 65 for PC1
pinctrl-at91-pio4 fc038000.pinctrl: found group selector 65 for PC1
pinctrl-at91-pio4 fc038000.pinctrl: found group selector 66 for PC2
pinctrl-at91-pio4 fc038000.pinctrl: found group selector 66 for PC2
pinctrl-at91-pio4 fc038000.pinctrl: found group selector 67 for PC3
pinctrl-at91-pio4 fc038000.pinctrl: found group selector 67 for PC3
pinctrl-at91-pio4 fc038000.pinctrl: found group selector 68 for PC4
pinctrl-at91-pio4 fc038000.pinctrl: found group selector 68 for PC4
pinctrl-at91-pio4 fc038000.pinctrl: found group selector 69 for PC5
pinctrl-at91-pio4 fc038000.pinctrl: found group selector 69 for PC5
atmel_spi fc000000.spi: Using dma0chan0 (tx) and dma0chan1 (rx) for DMA transfers
atmel_spi fc000000.spi: Using FIFO (16 data)
spidev@0 enforce active low on chipselect handle
pinctrl-at91-pio4 fc038000.pinctrl: request pin 68 (PC4) for fc038000.pinctrl:68
pinctrl-at91-pio4 fc038000.pinctrl: enable pin 68 as GPIO
spidev@1 enforce active low on chipselect handle
pinctrl-at91-pio4 fc038000.pinctrl: request pin 69 (PC5) for fc038000.pinctrl:69
pinctrl-at91-pio4 fc038000.pinctrl: enable pin 69 as GPIO
atmel_spi fc000000.spi: Atmel SPI Controller version 0x311 at 0xfc000000 (irq 39)
generic pinconfig core: found bias-pull-up with value 1
The missing context in my prior post for pin muxing follows

Code: Select all

&pioA {
	/*
	 * There is no real pinmux for ADC, if the pin
	 * is not requested by another peripheral then
	 * the muxing is done when channel is enabled.
	 * Requesting pins for ADC is GPIO is
	 * encouraged to prevent conflicts and to
	 * disable bias in order to be in the same
	 * state when the pin is not muxed to the adc.
	 */
	pinctrl_adc_default: adc_default {
		pinmux = <PIN_PD25__GPIO>,
			 <PIN_PD26__GPIO>;
		bias-disable;
	};

	pinctrl_flx0_default: flx0_usart_default {
		pinmux = <PIN_PB28__FLEXCOM0_IO0>,
			 <PIN_PB29__FLEXCOM0_IO1>;
		bias-disable;
	};

	pinctrl_key_gpio_default: key_gpio_default {
		pinmux = <PIN_PB2__GPIO>;
		bias-pull-up;
	};

	pinctrl_led_gpio_default: led_gpio_default {
		pinmux = <PIN_PA6__GPIO>,
			 <PIN_PA7__GPIO>,
			 <PIN_PA8__GPIO>;
		bias-pull-down;
	};

	pinctrl_sdmmc0_default: sdmmc0_default {
		cmd_data {
			pinmux = <PIN_PA1__SDMMC0_CMD>,
				 <PIN_PA2__SDMMC0_DAT0>,
				 <PIN_PA3__SDMMC0_DAT1>,
				 <PIN_PA4__SDMMC0_DAT2>,
				 <PIN_PA5__SDMMC0_DAT3>;
			bias-disable;
		};

		ck_cd_vddsel {
			pinmux = <PIN_PA0__SDMMC0_CK>,
				 <PIN_PA11__SDMMC0_VDDSEL>,
				 <PIN_PA12__SDMMC0_WP>,
				 <PIN_PA13__SDMMC0_CD>;
			bias-disable;
		};
	};

	pinctrl_uart0_default: uart0_default {
		pinmux = <PIN_PB26__URXD0>,
			 <PIN_PB27__UTXD0>;
		bias-disable;
	};

	pinctrl_uart3_default: uart3_default {
		pinmux = <PIN_PB11__URXD3>,
			 <PIN_PB12__UTXD3>;
		bias-disable;
	};

	pinctrl_pwm0_default: pwm0_default {
		pinmux = <PIN_PA31__PWML0>,
			 <PIN_PA30__PWMH0>;
		bias-disable;
	};

	pinctrl_pwm1_default: pwm1_default {
		pinmux = <PIN_PB0__PWMH1>,
			 <PIN_PB1__PWML1>;
		bias-disable;
	};
	
	pinctrl_usb_default: usb_default {
		pinmux = <PIN_PA10__GPIO>;
		bias-disable;
	};

	pinctrl_usba_vbus: usba_vbus {
		pinmux = <PIN_PA16__GPIO>;
		bias-disable;
	};
	
	pinctrl_pps_default: pps_default {
        pinmux = <PIN_PD3__GPIO>;
        bias-disable;
    };
    
	pinctrl_spi1_default: spi1_default {
    pinmux = <PIN_PC1__SPI1_SPCK>,
      <PIN_PC2__SPI1_MOSI>,
      <PIN_PC3__SPI1_MISO>;
		bias-disable;
	};
	
	pinctrl_mk1_spi_cs: mk1_spi_cs {
		pinmux = <PIN_PC5__SPI1_NPCS1>;
		bias-disable;
	};

	pinctrl_mk2_spi_cs: mk2_spi_cs {
		pinmux = <PIN_PC4__SPI1_NPCS0>;
		bias-disable;
	};
  
  pinctrl_disp1_gpios: disp1_gpios {
    pinmux = <PIN_PD11__GPIO>,
      <PIN_PD12__GPIO>,
      <PIN_PD13__GPIO>,
      <PIN_PD14__GPIO>;
    bias-pull-down;
  };
  
  pinctrl_disp2_gpios: disp2_gpios {
    pinmux = <PIN_PD5__GPIO>,
      <PIN_PD6__GPIO>,
      <PIN_PD7__GPIO>,
      <PIN_PD8__GPIO>;
    bias-pull-down;
  };
  
  pinctrl_pout_gpios: pout_gpios {
    pinmux = <PIN_PD15__GPIO>,
      <PIN_PD16__GPIO>,
      <PIN_PD17__GPIO>,
      <PIN_PD18__GPIO>,
      <PIN_PD10__GPIO>;
    bias-pull-up;
  };
  
  pinctrl_lora_int: lora_int {
    pinmux = <PIN_PB3__GPIO>;
    bias-disable;
  };
  
  pinctrl_lora_reset: lora_reset {
    pinmux = <PIN_PC0__GPIO>;
    bias-pull-up;
  };

	pinctrl_key_default: key_default {
		pinmux = <PIN_PB2__GPIO>,
        <PIN_PD2__GPIO>;
		bias-pull-up;
	};
  
  pinctrl_other_gpios: other_gpios {
    pinmux = <PIN_PD4__GPIO>,
      <PIN_PD9__GPIO>,
      <PIN_PC7__GPIO>,
      <PIN_PB0__GPIO>,
      <PIN_PB1__GPIO>;
  };
};
The correct MISO/MOSI pins were shorted, output does not change when not shorted

Regards
blue_z
Location: USA
Posts: 2103
Joined: Thu Apr 19, 2007 10:15 pm

Re: ATSAMA5D27-WLSOM1 EK enable SPI1 on mikrobus

Wed Jul 01, 2020 12:44 am

Marc7909 wrote: I did enable the debug output for pinctrl.
The output seems to indicate that the pin group(s) from the DT are recognized, but the pin multiplexing operations are skipped.

Marc7909 wrote: The correct MISO/MOSI pins were shorted, output does not change when not shorted
The identical test results can be explained by assuming that the SPI controller is not connected to the pins.
IOW at least two (but apparently all five) of the the pins are multiplexed for some assignment other than this SPI peripheral.

Scrutinizing the SPI node in your DT indicates a typo in a salient property name:
Marc7909 wrote: Changes to device-tree

Code: Select all

&spi1 {
	status = "okay";
  
  pinctrl-name = "default";
  ...
The expected/correct property name needs to be " pinctrl-names".
Apparently the DT compiler is only capable of flagging syntax errors and not a misspelled property name.

Regards
Marc7909
Posts: 14
Joined: Mon Apr 20, 2020 3:14 pm

Re: ATSAMA5D27-WLSOM1 EK enable SPI1 on mikrobus

Thu Jul 02, 2020 1:02 pm

Thanks blue_z, that "s" is what stood between <SPI> an <no SPI>.

Code: Select all

#  spidev_test -D /dev/spidev0.1 -v
spi mode: 0x4
bits per word: 8
max speed: 500000 Hz (500 KHz)
TX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D  | ......@....▒..................▒.
RX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D  | ......@....▒..................▒.
Regards

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