Problem with the Image loader through SAMBA AT91SAM9263-EK

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geobabu
Location: India
Posts: 2
Joined: Fri Feb 22, 2008 6:30 pm

Problem with the Image loader through SAMBA AT91SAM9263-EK

Wed Jun 04, 2008 4:08 pm

Hi,
This is first time i am working with the 9263EK board. As per the manuals i tried to laod the WinCE demo kernel into the board. For that i selected the ""Enable Dataflash on CS0"", which executed fine. And while executing the ""Send Boot file"" the error is generated like "DataFlash Not Detected" . So please hlp me to rectify this problem......

I am giving the generated Log below....

loading history file ... 0 events added
SAM-BA console display active (Tcl8.4.13 / Tk8.4.13)
(AT91-ISP v1.8) 1 %
(AT91-ISP v1.8) 1 % DATAFLASH::SelectDataflash AT91C_SPI0_CS0
-I- Init SPI0 for DataFlash interfaces
-I- Configure SPI0 PIOs
-I- Enable PMC for SPI0
-I- Reset the SPI0
-I- Configure SPI0 in Master Mode (no CS selected)
-I- Configure SPI0 CS0 for DataFlash AT45
-I- Disable the RX and TX PDC transfer requests
-I- Reset all Counter register Next buffer first
-I- Enable the RX and TX PDC transfer requests
-I- End of Init_DataFlash
-I- Switch to the correct PCS of SPI0 Mode Register (Fixed Peripheral Selected)
-I- Chip Select 0 Selected
-I- Enable the SPI0
-I- Wait for dataflash ready (bit7 of the status register)
-I- DataFlash AT45DB642
-I- End of Select DataFlash
(AT91-ISP v1.8) 1 % DATAFLASH::SendBootFileGUI
-I- Init SPI0 for DataFlash interfaces
-I- Configure SPI0 PIOs
-I- Enable PMC for SPI0
-I- Reset the SPI0
-I- Configure SPI0 in Master Mode (no CS selected)
-I- Configure SPI0 CS0 for DataFlash AT45
-I- Disable the RX and TX PDC transfer requests
-I- Reset all Counter register Next buffer first
-I- Enable the RX and TX PDC transfer requests
-I- End of Init_DataFlash
-I- Init SPI0 for DataFlash interfaces
-I- Configure SPI0 PIOs
-I- Enable PMC for SPI0
-I- Reset the SPI0
-I- Configure SPI0 in Master Mode (no CS selected)
-I- Configure SPI0 CS0 for DataFlash AT45
-I- Disable the RX and TX PDC transfer requests
-I- Reset all Counter register Next buffer first
-I- Enable the RX and TX PDC transfer requests
-I- End of Init_DataFlash
-I- Switch to the correct PCS of SPI0 Mode Register (Fixed Peripheral Selected)
-I- Chip Select 0 Selected
-I- Enable the SPI0
-I- Wait for dataflash ready (bit7 of the status register)
-E- DataFlash Not Detected
-E- No File Selected

(AT91-ISP v1.8) 1 %

Regards,
Geo

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