I'm having trouble getting the SPI to function. I'm receiving data even when I talk to an open port. Here is the code that I'm using to enable the SPI interface:
volatile unsigned int uDummy;//this is volatile to make sure that the loop below takes time
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI0; //enable the clock for this peripheral
AT91C_BASE_SPI0->SPI_CR = SPI_Disable; //disable spi
AT91C_BASE_SPI0->SPI_CR = SPI_Software_Reset;//SPI wasn't working correctly
AT91C_BASE_SPI0->SPI_CR = SPI_Software_Reset;//got this from IAR example with SPI
AT91C_BASE_SPI0->SPI_MR = SPI_MODE_Default;//defaults to ADC chip select
AT91C_BASE_SPI0->SPI_CSR = ADC_CS_Reg; //sets up basic stuff for ADC, clock polarity freq etc
AT91C_BASE_SPI0->SPI_CR = SPI_Enable;
for (uDummy=0; uDummy<100000; uDummy++);//give it a moment to enable
uDummy = AT91C_BASE_SPI0->SPI_SR;
uDummy = AT91C_BASE_SPI0->SPI_RDR;
//read Status and Received data registers
volatile int dummy;
AT91C_BASE_SPI0->SPI_MR = SPI_MODE_Default; //make sure adc is chip select
while((AT91C_BASE_SPI0->SPI_SR & Transmit_In_Progress) == 0);//make sure we aren't already busy
PIO_Clear(&pinSPIcs); //chip select
AT91C_BASE_SPI0->SPI_TDR = ADC_Init; //begin spi transfer
while((AT91C_BASE_SPI0->SPI_SR & TDR_Empty) == 0);//wait until data is in shift reg
while((AT91C_BASE_SPI0->SPI_SR & RDR_Full) == 0); //wait until transmit is complete
dummy = AT91C_BASE_SPI0->SPI_RDR & 0xFFFF; //read this to prevent overrun errors
printf("SPI Recieved Data Reg=%x\n\r",dummy);
Do you see any issues with the above code? I've checked all of the registers for SPI prior to sending the command and they all look good. I've tried different chip selects but I'm still receiving 0x03FF in the received data reg after a transfer to an unpopulated chip select. Also, I'm a bit confused why the IAR example uses the PIO_Set and Clear commands, I would think that the SPI interface would handle this for you. I'm using a sck value of 2 MHz and sending 10 bits at a time. Thanks for the help. Any insight would be greatly appreciated.
Discussion around product based on ARM Cortex M3 core.
3 posts • Page 1 of 1
This is expected. The processor pins default with Pull ups enabled unless you have disabled them, so when clocking data on a line with nothing connected and 10 bits transfered you are reading the pulled up line (0x03FF).I've tried different chip selects but I'm still receiving 0x03FF in the received data reg after a transfer to an unpopulated chip select.
To have the SPI interface handle the CS line you must set the PS bit in the SPI_MR, then when you send data you must set the PCS field in the SPI_TDR register with the appropriate data for your CS line. If you decide to implement this take note of the LASTXFER bit in the SPI_TDR.Also, I'm a bit confused why the IAR example uses the PIO_Set and Clear commands, I would think that the SPI interface would handle this for you.
Duane P. Fridley, IEEE CSDP
Viable Bytes, Inc.
Viable Bytes, Inc.
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