NVIC

Discussion around product based on ARM Cortex M3 core.

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misterC
Posts: 3
Joined: Thu Dec 10, 2009 10:14 am

NVIC

Thu May 13, 2010 1:11 am

Anyone know how to configure a falling edge interrupt for SPI with NVIC
Somebody worked witch this NVIC and if you have someone example
Crossware
Posts: 8
Joined: Sat Oct 17, 2009 3:13 pm

Re: NVIC

Tue May 18, 2010 8:48 pm

Well I don't know about 'falling edge' and the NVIC. (Falling/rising edge selection reminds me of the SAM7 AIC.)

Our SPI wizard indicates that the SPI interrupt is enabled in the NVIC using:

g_pNVIC->SETENABLE0_31 = 0X100000;
g_pNVIC->PRIORITY20_23 |= 0X00000002;

(for a priority level of 2)

Then you need to separately enable interrupts in the SPI module itself, such as:

g_pSPI->IER = UNDES | TXEMPTY | NSSR | OVRES | MODF | TDRE | RDRF;

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