Hi folks, I am planning on using SPI Master in Fixed Peripheral Select mode (NPCS0 only). The question is, are the unused NPCS1-3 pins unavailable for other duties? Looks like the SPI peripheral defaults the four NPCS pins to 0xF in Master mode. So maybe these pins cannot be allocated as general purpose digital IO. If this is true though, the use of the SPI peripheral in Master uses up a lot of pins!
Discussion around product based on ARM Cortex M3 core.
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