connecting VDDIO to VDDOUT - a bad idea ?

Discussion around product based on ARM Cortex M3 core.

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kultakangas
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connecting VDDIO to VDDOUT - a bad idea ?

Thu Apr 02, 2015 3:57 am

i am considering whether to use SAM3X8E in a project requiring 1.8V logic level for external peripherals. According to the datasheet i can supply the required voltage (in range from 1.62V to 3.6V) to VDDIO pin, which will determine the logic level of I/O.

However, the application note "Atmel AT03462: ATSAM3X and ATSAM3A Series - Checklist" does not specifically mention such option.

The question is: did I understand correctly that the datasheet does not recommend against supplying VDDIO, VDDCORE and VDDPLL with the output of the voltage regulator (VDDOUT) ? According to the datasheet, the voltage regulator can provide up to 150mA@1.8V if VDDIN is above a certain level. I don't see any reason why VDDCORE, VDDPLL and the external I/O peripherals would drain under any circumstances more than 100mA.

Why such option is not specifically recommended or at least mentioned? Is there something that can render it a bad idea ?

Best regards,
Sten Kultakangas

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