Performance of the code execution from RAM

Discussion around product based on ARM Cortex M4 core.

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Performance of the code execution from RAM

Fri Oct 07, 2016 5:28 pm

Hi all,

I was having some problems with time it takes to execute a part of the code form flash. I have placed all code that is being executed in main loop in RAM functions plus main function and communication ISR. Beside that I have placed IVT in RAM (following tutorial described in document Atmel-42249-Executing-code-from-RAM_Application-Note_AT07347.pdf).
The end result was that execution time remained almost the same. I have checked in debugger and indeed the code that is executed is located in RAM.

I am using SAM4S8 microcontroller and it runs on maximal frequency (120MHz) so I have 5 wait cycles set in EEFC_FMR when code is being executed form flash. I know that there is some sort of pipeline implemented in the core and data and instruction buffers in flash controller but I was expecting some improvement after switching to RAM. Did anyone had similar issues?

The code that is problematic are some for loops with very little calculation in them (XOR of elements in an uint16_t buffer).

While I was trying to understand how are instructions fetched and executed I have stumbled on a part of datasheet that I don't understand. In sub section 25.2 of the Bus Matrix. According to the provided table there is no direct connection between internal SRAM and Cortex-M4 Instruction/Data Bus. Could it be the reason for lack of difference between flash and RAM execution?


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