Accessing FPGA on SMC external bus from user space(sama5d36)

Discussion around products based on ARM Cortex-A5 core.

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dlad
Posts: 20
Joined: Mon Jul 27, 2015 4:27 pm

Accessing FPGA on SMC external bus from user space(sama5d36)

Mon Jan 04, 2016 1:16 pm

Hello,
I'm using a SAMA5d3-like custom board. I'm trying accessing data from a FPGA connected on the external bus.

On u-boot, I can read data using md command.

When I run Linux, I try to read the same data using open("/dev/mem") and mmap but each time I only read 0x00
I then added memdev2 tool to do the same work but I still read 0x00.
If I tried dd command tool at this address, it will returns Bad Address error. My kernel (same kernel as sama5d3_xplained board built with Yocto) is built without the CONFIG_STRICT_DEVMEM variable so I should be able accessing my data with /dev/mem...
Moreover my FPGA doesn't appear in /proc/iomem (I've tried adding it into the device tree but it doesn't change anything maybe I'm missing a point)

Anyone got an idea for reading my data from user space ?

I would like avoid using kernel driver...
blue_z
Location: USA
Posts: 2131
Joined: Thu Apr 19, 2007 10:15 pm

Re: Accessing FPGA on SMC external bus from user space(sama5

Wed Jan 06, 2016 12:39 am

dlad wrote:I'm using a SAMA5d3-like custom board.
How can a SoC be "SAMA5d3-like"?
Either you're using a real Atmel SAMA5D3x SoC or you're not.
dlad wrote:When I run Linux, I try to read the same data using open("/dev/mem") and mmap but each time I only read 0x00
So how do you know if your program works correctly? Post your code?
dlad wrote:My kernel (same kernel as sama5d3_xplained board built with Yocto)...
I don't play silly guessing games. There's a reason version numbers are assigned.
dlad wrote:Moreover my FPGA doesn't appear in /proc/iomem
How do you expect the kernel to be aware of your external device?
If you don't have a device driver registering the memory region (using request_mem_region()), then don't expect to see it that list.
dlad wrote:I've tried adding it into the device tree
Add what? Post the details.

Does your FPGA use any PIO lines (e.g. an input to manage the Ready/Busy signal)?
dlad wrote:I would like avoid using kernel driver...
With configuration by Device Tree instead of board file, that may be hard to avoid.

Regards
dlad
Posts: 20
Joined: Mon Jul 27, 2015 4:27 pm

Re: Accessing FPGA on SMC external bus from user space(sama5

Wed Jan 06, 2016 5:25 pm

Thanks for your reply.
I'm sorry, I misspoke.

I'm working on a custom board based on SAM5D36 (same chip as SAM5D3_Xplained board).
My kernel is 3.18

You will find the code use from user space :

Code: Select all

#define FPGA_MEMORY_START	0x40000000
static char* fpgaMem;
static int memMap;

static int OpenSystemMemoryController(void)
{
	if ((memMap = open("/dev/mem", O_RDWR | O_SYNC)) < 0)
	{
		printf("ERROR: Unable to open /dev/mem\n");
		return (errno);
	}

	fpgaMem = mmap(NULL, 4096, PROT_READ|PROT_WRITE ,
		MAP_PRIVATE, memMap, (unsigned int)FPGA_MEMORY_START);

	if (fpgaMem == MAP_FAILED)
	{
		printf("ERROR: Unable to mmap the system controller\n");
		close (memMap);
		memMap = -1;
		return (errno);
	}
	
		printf("SUCCESS: Map to virtual memory\n");

	return (0);
}

int main (int argc, char **argv) {
int i;
	if(OpenSystemMemoryController() != 0)
	{
		printf("ERROR: Cannot map memory, program will exit\n");
		close (memMap);
		exit(errno);
	}
    for(i=0;i<100;i++) {
			printf("addr:%d  %p  %2x  \n",i,fpgaMem,
					*(fpgaMem++));
		}
}
Here is code added to my devicetree (added in the at91-sam5d3_xplained.dts just before nand declaration) :

Code: Select all

	

[color=#FF0040]fpga0: fpga@40000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x40000000 0x1000>;
		};[/color]

nand0: nand@60000000 {
			nand-bus-width = <8>;
			nand-ecc-mode = "hw";
			atmel,has-pmecc;
			atmel,pmecc-cap = <4>;
			atmel,pmecc-sector-size = <512>;
			nand-on-flash-bbt;
			status = "okay";

			at91bootstrap@0 {
				label = "at91bootstrap";
				reg = <0x0 0x40000>;
			};

			bootloader@40000 {
				label = "bootloader";
				reg = <0x40000 0x80000>;
			};

			bootloaderenv@c0000 {
				label = "bootloader env";
				reg = <0xc0000 0xc0000>;
			};

			dtb@180000 {
				label = "device tree";
				reg = <0x180000 0x80000>;
			};

			kernel@200000 {
				label = "kernel";
				reg = <0x200000 0x600000>;
			};

			rootfs@800000 {
				label = "rootfs";
				reg = <0x800000 0x0f800000>;
			};
		};


FPGA is connected to my chip with A0 to A11 (PE0 to PE11), CS1 (PE27), data are on D0 to D7.
NAND_OE and NAND_WE are also connected.


Note also, I'm a beginner in Linux

Best regards
blue_z
Location: USA
Posts: 2131
Joined: Thu Apr 19, 2007 10:15 pm

Re: Accessing FPGA on SMC external bus from user space(sama5

Wed Jan 06, 2016 9:58 pm

Try a sanity check on the HW configuration.
Use U-Boot to obtain the contents of the salient HSMC, PMC and PIOE registers.
Then do the same in Linux with a hacked version of your program.

Regards
dlad
Posts: 20
Joined: Mon Jul 27, 2015 4:27 pm

Re: Accessing FPGA on SMC external bus from user space(sama5

Fri Jan 08, 2016 6:16 pm

Hello,

I found what's wrong in my configuration. PIOE Status Register was not the same when I run U-boot and Linux. Some address were declare as GPIO by the devicetree. I've edit it, now I'm able to read my data from my FPGA using my program or devmem2

Thanks blue_z for your help and your patience.

Regards
Jimmy.Zhu
Posts: 14
Joined: Mon Sep 14, 2015 9:15 am

Re: Accessing FPGA on SMC external bus from user space(sama5

Mon Apr 11, 2016 6:05 am

Hi Dlad

This is my question:
discussions/viewtopic.php/f,30/t,25353.html

I known you just access 4K address range from your devicetree, but did you try the address larger than 4K, if it's OK?

Thanks
dlad
Posts: 20
Joined: Mon Jul 27, 2015 4:27 pm

Re: Accessing FPGA on SMC external bus from user space(sama5

Mon Apr 11, 2016 10:52 am

Hello,
I never tried to access more than 4k (minimal page size) because there is no need in our project.
You should try to dump the memory from your HSMC, PMC and PIOE registers from both U-boot and Linux to see if they are correctly setup. (maybe one pin is reallocated by another peripheral ?)

Regards
Jimmy.Zhu
Posts: 14
Joined: Mon Sep 14, 2015 9:15 am

Re: Accessing FPGA on SMC external bus from user space(sama5

Tue Apr 12, 2016 9:59 am

Hi Dlad,

What is the read and write mode you set in the mode register?
And I allocate A0-A15,D0-D15, NRD,NWE,NCS, are there any other pins to be allocate?

Thanks

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