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flash_erase /dev/mtd0 0 0
nandwrite -p /dev/mtd0 nand_header_boot.bin
Any insight on how I can get the newest at91bootstrap to work on my custom board?
Moderator: nferre
Code: Select all
flash_erase /dev/mtd0 0 0
nandwrite -p /dev/mtd0 nand_header_boot.bin
According to the SoC datasheet:cajjed wrote: ↑I would like to update the 1st stage bootloader ...
You cannot modify this "1st stage bootloader" because it is in ROM.The ROM code is a boot program contained in the embedded ROM. It is also called “First level bootloader”.
You need to thoroughly investigate this failure mode to gather salient details.cajjed wrote: ↑... but all I get is RomBOOT.
Instead of making assumptions, you need to confirm that the PMECC header, AT91Bootstrap, U-Boot, and the Linux kernel are individually configured with the exact same NAND and PMECC parameters for the specific NAND flash chip in use.cajjed wrote: ↑I have validated that I have the same pmec/nand_header for both files so I assumed that I would at least see something ...
...
> ... because I assume it is doing the same thing as my code above.
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RomBOOT
v2.1 Oct 19 2012 17:38:58
>
0x00000000
>
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RomBOOT
U-Boot SPL 2014.07 (Oct 12 2018 - 12:56:12)
Board Revision: R2
Increase core voltage from 1.2V to 1.25V
You need to be more precise.cajjed wrote: ↑I got the same response from the command:
...
No. What??!!cajjed wrote: ↑So this board can only be booted from SD card, in other words by using boot.bin from uboot?
What is this?cajjed wrote: ↑Code: Select all
RomBOOT U-Boot SPL 2014.07 (Oct 12 2018 - 12:56:12) Board Revision: R2 Increase core voltage from 1.2V to 1.25V
"AT91bootparams binary file"???cajjed wrote:However, how to you set it so that it will boot using the AT91bootparams binary file rather than boot.bin from uboot?
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flash_erase /dev/mtd0 0 0
flash_erase /dev/mtd1 0 0
...
nandwrite -p /dev/mtd0 nand_header_boot.bin
nandwrite -p /dev/mtd1 u-boot.bin
...
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RomBOOT
V# (command does not get echoed)
v2.1 Oct 19 2012 17:38:58
wFFFFFE54,# (command does not get echoed)
>
0x00000000
>
Yes, reveal salient information at your leisurely convenience.cajjed wrote: ↑I know that my clock uses a 24 MHz crystal instead of the 12 MHz that the xplained board uses. I have tried to change that in code but probably don't have it correct yet.
There's the SoftPack, but IMO it would be an unnecessary detour.cajjed wrote: ↑Is there a minimalist build, almost like a hello world, that removes most of the options so I can just focus on getting any kind of initial response?
That is an officially-tested toolchain, and it does build a working binary for a NAND boot but test loaded from SDcard:cajjed wrote: ↑And I am using gcc-linaro-7.3.1-2018.05-x86_64_arm-linux-gnueabihf...
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RomBOOT
AT91Bootstrap 3.8.11 (Thu Oct 18 xx:xx:xx xDT 2018)
1-Wire: Loading 1-Wire information ...
1-Wire: ROM Searching ... Done, 3 1-Wire chips found
1-Wire: BoardName | [Revid] | VendorName
#0 SAMA5D36-CM [EE5] FLEX
#1 SAMA5D3x-MB [CC3] FLEX
#2 SAMA5D3x-DM [BB2] FLEX
1-Wire: Board sn: 0x481244e revision: 0x6a8824
NAND: ONFI flash detected
NAND: Manufacturer ID: 0x2c Chip ID: 0xda
NAND: Page Bytes: 2048, Spare Bytes: 64
NAND: ECC Correctability Bits: 4, ECC Sector Bytes: 512
NAND: Disable On-Die ECC
NAND: Initialize PMECC params, cap: 4, sector: 512
NAND: Image: Copy 0xa0000 bytes from 0x40000 to 0x26f00000
NAND: Done to load image
<debug_uart>
...
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static void at91_test_pin_init(void)
{
/* Configure test pins */
const struct pio_desc test_pins[] = {
{"TST1", AT91C_PIN_PB(14), 0, PIO_DEFAULT, PIO_OUTPUT},
{"TST2", AT91C_PIN_PB(15), 0, PIO_DEFAULT, PIO_OUTPUT},
{(char *)0, 0, 0, PIO_DEFAULT, PIO_PERIPH_A},
};
/* Configure the test pins */
pmc_enable_periph_clock(AT91C_ID_PIOB);
pio_configure(test_pins);
}
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