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SAMA5D2x LCD controller

Posted: Wed May 29, 2019 5:22 pm
by andyp
Why does the data sheet for the SAMA5D2x family of devices state
LCD TFT controller (LCDC) up to 1024x768 or 1280x768 (still image).
The register definition for LCD Controller Configuration Register 4 (LCDC_LCDCFG4) defines 11 bits for rows per frame and the same for pixels per line:
Bits 26:16 – RPF[10:0] Number of Active Row Per Frame
Number of active lines in the frame. The frame height is equal to (RPF+1) lines.
Bits 10:0 – PPL[10:0] Number of Pixels Per Line
Number of pixels in the frame. The number of active pixels in the frame is equal to (PPL+1) pixels.
Surely this gives a theoretical maximum resolution of 2048 x 2048 pixels. Is it simply the case that the performance of the LCD controller degrades the higher the resolution?


Re: SAMA5D2x LCD controller

Posted: Thu May 30, 2019 9:56 pm
by blue_z
The product of spatial resolution, bits per pixel, and frame rate (aka refresh rate) can impose a performance demand that the system cannot accommodate.
The memory bandwidth is one such limitation.
Study AN 11216, Configuring the LCD Controller of SAMA5D3x Devices.