I never used DMA before, but I would like to learn how to use it in a SAM D21 device.
I usually write a interrupt-based USART device driver where the incoming bytes are moved in a FIFO buffer in SRAM. The application in the background reads new data from the FIFO and process them.
I would like to use DMA to automatically transfer data from USART to SRAM FIFO buffer, but I couldn't see how to do this.
In my case, the beat size should be a byte. I couldn't understand what is the length of the burst transfer (datasheet says it is set with CHCTRLA.BURSTLEN, but there isn't BURSTLEN field in CHCTRLA register description). Maybe it is one beat transfer, so one byte.
A block transfer should have an associated length set in BTCNT register.
However, in my case I don't have a fixed length of transfers, because the buffer in SRAM is a FIFO buffer, theorically an infinite buffer.
Maybe I should set the size of the FIFO buffer as the transfer block count, triggers an interrupt when the block transfer is completed and re-enable the DMA channel/transfer from the beginning of the FIFO buffer.
However I have another problem. How the background application could know how many data bytes are present in the FIFO buffer?
Discussions around product based on ARM Cortex M0+ core.
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