[SOLVED] SAM V71 Xplained Ultra ADC AFEC problems

[randyMarsh]

Hi Everybody,

I'm just tinkering around with the AFEC peripherial in the SAM V71 Explained Ultra.
I managed to get one channel of the ADC working, but it has an offset of 0x800 when the input signal is 0V.
I read the user guide forwards and backwards and i don't really know why it's happening.

Anybody has experienced this problem?

Thanks in advance,

RandyMarsh.

P.D. I attach the configuration file for the ADC

#define TEST_CHANNEL 1
#define AFE_CLK 2200000


static void
_afe_initialization(void)
{
AFEC_Initialize(AFEC1, ID_AFEC1);
AFEC_SetModeReg(AFEC1,
AFEC_MR_FREERUN_ON
| AFEC_EMR_RES_NO_AVERAGE
| (1 << AFEC_MR_TRANSFER_Pos)
| (2 << AFEC_MR_TRACKTIM_Pos)
| AFEC_MR_ONE
| AFEC_MR_SETTLING_AST3
| AFEC_MR_STARTUP_SUT64
| AFEC_MR_TRGEN_DIS);

AFEC_SetClock( AFEC1, AFE_CLK, BOARD_MCK);
AFEC_SetExtModeReg(AFEC1,
0
| AFEC_EMR_RES_NO_AVERAGE
| AFEC_EMR_TAG
| AFEC_EMR_STM);
AFEC_SetAnalogControl(AFEC1, AFEC_ACR_IBCTL(1) | AFEC_ACR_PGA0_ON |
AFEC_ACR_PGA1_ON);
AFEC_SetChannelGain(AFEC1, AFEC_CGR_GAIN6(0));
AFEC_EnableChannel(AFEC1, TEST_CHANNEL);
}

[randyMarsh]

UPDATE

I've been tinkering around the problem and looks like there are some problems with the AFEC Channel Offset Compensation Register. I tried to write a value in it and when i read it returns always 0.

Anyone has a hint?

Regards,

Randy Marsh

[randyMarsh]

Hi,

Finally i figured out the problem. the offset applied to Vin is this one:

Voffset = (-Vref/1024)*AOFF + Vref/2

Where AOFF is theAOFF field in the Channel Offset Compensation register .

The SAM V70 PRELIMINARY DATASHEET it's again wrong. it would be nice that Atmel should take care
and fix the errata, since i lost a lot of time figuring out where the problem could be.

I hope this will be helpfull to anyone who is trying to work thith the SAMV MCU.

Regards,

Randy Marsh