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How to allocate SDRAM for cache and no-cache?

Posted: Wed Jun 24, 2009 2:08 pm
by jklstar
I am using AT91Sam9260 EVM to develop my project, but there is a big problem at the beginning:

In order to get a better Performance from CPU, MMU is enabled, data-cache is enabled. On the other hand, the handle of SPI dataflash is not allowed to use cache because of data conflict. So SDRAM has to be separated to serveral parts, some of which are cachable and others of which are not.

The problem is:
When all of these different parts are united to generate "binary" file, it becomes larger than before(e.g. 300K->1.5M). The unused space between these different parts are also taken into account. Are there some methods to avoid this and minimize the binary file's size?

Re: How to allocate SDRAM for cache and no-cache?

Posted: Thu Jul 16, 2009 3:25 pm
by KarlSoneson
All: I am having the same problem. When I generate a binary file from the IAR Output Converter option, I get a 512MB binary file! It is including the address space between the vectors at low memory, and the rest of the application at SDRAM addresses starting at 0x20000000.
I would think there would be an option to have the application copy the vectors at startup initialization time. There should be a linker config option to initialize a segment by copying it from FLASH. I have played with the 'initialize by copy' icf command with no luck.
Anyone know how to copy the vectors at startup time?

Re: How to allocate SDRAM for cache and no-cache?

Posted: Thu Jul 16, 2009 5:15 pm
by KarlSoneson
I may have found a solution to the BIG .bin file problem. In my case, I needed to have the interrupt vectors located into low SRAM, and the rest of the code in dynamic SDRAM. But the .bin file had the two segments in the file with the huge filler of nulls in between.
So I changed the SECTION declaration for the vectors from CODE to DATA. Now the linker treats the interrupt vectors and the reset ISR as something that needs to be init'd at startup. So now it keeps the vectors in FLASH and the startup inits the code by copying it down to SRAM before interrupts are enabled.
It seems to work.

I would suggest you look for places where your sections are linked directly to the absolute addresses you specified to the linker, and make them look like data sections that need to be init'd (aka: copied) by the startup code.
Good Luck.