Unused SPI NPCS pins available for IO?

Discussion around product based on ARM Cortex M3 core.

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dougcl
Posts: 10
Joined: Tue Nov 04, 2014 5:09 pm

Unused SPI NPCS pins available for IO?

Mon Jan 12, 2015 1:18 am

Hi folks, I am planning on using SPI Master in Fixed Peripheral Select mode (NPCS0 only). The question is, are the unused NPCS1-3 pins unavailable for other duties? Looks like the SPI peripheral defaults the four NPCS pins to 0xF in Master mode. So maybe these pins cannot be allocated as general purpose digital IO. If this is true though, the use of the SPI peripheral in Master uses up a lot of pins!

Thanks
Doug
kshysio
Posts: 25
Joined: Thu Nov 03, 2011 11:17 am

Re: Unused SPI NPCS pins available for IO?

Mon Jan 12, 2015 8:20 pm

hi, you can configure every pin function by setting they peripheral A, B, C bits. so configuring SPI channel and configuring PIO - it's two different things, for example you can use NPCS pin as general IO and activate them manually...

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