I to have problem with unreliable NAND-flash. I noticed that my board producer had changed the NAND-flash from
Toshiba TC58NVG1S3ETA00 to
Micron mt29F2G08abaeawp
but I am not sure this has led to increased number of defect boards.
There is a lot of literature on how to make NAND-flash more reliable, increasing number of ECC bits and even adding a redundant boot system.https://www.ronetix.at/an014_SAMA5D3x_8bit_ECC.html
My board only has 2 ECC bits per 512 bytes. The NAND data sheet says 4 ECC bits is minimum. I would like to change the ECC bits to 8 but I don't know how. At what point is the number of ECC bits set?
I have a sama5d3 xplained board. Is there somewhere instructions on how to increase the number of ECC bytes from 4 to 8 for that board?
The nand flash is defined in the following way in the dts file, sama5d3.dtsi.
Code: Select all
nand0: nand@60000000 {
compatible = "atmel,at91rm9200-nand";
#address-cells = <1>;
#size-cells = <1>;
ranges;
reg = < 0x60000000 0x01000000 /* EBI CS3 */
0xffffc070 0x00000490 /* SMC PMECC regs */
0xffffc500 0x00000100 /* SMC PMECC Error Location regs */
0x00110000 0x00018000 /* ROM code */
>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
atmel,nand-addr-offset = <21>;
atmel,nand-cmd-offset = <22>;
atmel,nand-has-dma;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand0_ale_cle>;
atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
status = "disabled";
nfc@70000000 {
compatible = "atmel,sama5d3-nfc";
#address-cells = <1>;
#size-cells = <1>;
reg = <
0x70000000 0x08000000 /* NFC Command Registers */
0xffffc000 0x00000070 /* NFC HSMC regs */
0x00200000 0x00100000 /* NFC SRAM banks */
>;
clocks = <&hsmc_clk>;
};
};
Or please explain the following parameters:
/* ROM code */ in reg <>
atmel,pmecc-lookup-table-offset
/* NFC Command Registers */
I am not sure my parameters are correct.
Regards
Gudjon